Backside Body Contacts for Integrated Circuit Devices
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Solution Overview
Problem
In the formation of integrated circuits, existing technologies face challenges in efficiently forming backside contacts that do not occupy extra chip area and improve Electro-Static Discharge (ESD) performance and resistance to latch-up, while effectively connecting well regions to bias voltages.
Innovation Solution
The method involves forming heavily doped p-type and n-type pickup regions in well regions, followed by hydrogen implantation, smart cutting, and forming backside body contacts and interconnect structures to connect these regions, allowing for efficient electrical coupling without occupying additional chip space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If backside contacts are formed to connect well regions to bias voltages, then ESD performance and latch-up resistance are improved, but chip area is occupied
Solution Approach 1:
The patent moves the well pickup regions from the front surface to the back surface of the semiconductor substrate, utilizing the third dimension (depth/vertical positioning) to resolve the area conflict. By forming pickup regions at the backside, the contacts no longer occupy precious front surface area where transistors are located, while still achieving the necessary electrical connection for ESD protection and latch-up resistance.
Solution Approach 2:
Instead of forming well pickup regions on the front surface as in conventional structures, the patent inverts the approach by forming them on the back surface of the substrate. This inversion allows the pickup regions to overlap with transistor regions from the front surface perspective, effectively using the same spatial footprint without additional area consumption.
2Reliability
If pickup regions are heavily doped to improve electrical connectivity, then electrical conductivity is improved, but manufacturing complexity increases
Solution Approach 1:
The patent combines multiple functions into the backside pickup regions: they serve as both the well contact regions for bias voltage application and as the ESD protection structures. By merging these functions into a single structural element formed through integrated process steps, the manufacturing complexity is reduced compared to implementing separate structures for each function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances chip area usage, improves ESD performance, and increases resistance to latch-up by allowing backside body contacts to overlap with transistors, thereby improving electrical connectivity and package efficiency.
Implementation Method 1
hydrogen implantation
Implementation Method 2
The pickup regions are heavily doped semiconductor regions at the surfaces of the well regions
Data Source
AI summary
A chip includes a semiconductor substrate, a well region in the semiconductor substrate, and a transistor formed at a front side of the semiconductor substrate. A source/drain region of the transistor is disposed in the well region. A well pickup region is disposed in the well region, wherein the well pickup region is at a back side of the semiconductor substrate. A through-via penetrates through the semiconductor substrate, wherein the through-via electrically inter-couples the well pickup region and the source/drain region.