Backside-Bonded Photonics Layer for VLSI SOI Integration

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The integration of photonics functions with very large scale integration (VLSI) structures is complicated by the need to use valuable chip space, as photonics waveguides are typically integrated in the same substrate layer as Si transistors, complicating design and processing.

Innovation Solution

The integration of a photonics layer on the backside of a semiconductor substrate with a core and cladding layer, where the core is configured to couple light, allowing for the separation of photonics components from VLSI circuitry and efficient use of chip space.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If photonics waveguides are integrated in the same substrate layer as Si transistors, then integration of photonics functions with VLSI structures is achieved, but chip space is consumed and design and processing become complicated

Engineering Contradiction:
Improveintegration of photonics functions with VLSI structuresVSAvoidchip space
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent moves the photonics waveguide integration from the traditional planar substrate layer to the vertical dimension by bonding the optoelectronic device to the backside of the semiconductor substrate. This allows photonics components to coexist with VLSI circuitry on the front side without consuming chip real estate, effectively transitioning from 2D to 3D integration architecture.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The invention separates the photonics functions and VLSI circuitry into distinct physical locations: the optoelectronic device with waveguides is bonded to the backside of the substrate, while the VLSI circuitry remains on the front side. This segmentation eliminates competition for chip space and simplifies design and processing by allowing independent optimization of each subsystem.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If photonics waveguides are integrated in the same substrate layer as Si transistors, then integration of photonics functions with VLSI structures is achieved, but design and processing become complicated

Engineering Contradiction:
Improveintegration of photonics functions with VLSI structuresVSAvoiddesign and processing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The invention separates the photonics functions and VLSI circuitry into distinct physical locations: the optoelectronic device with waveguides is bonded to the backside of the substrate, while the VLSI circuitry remains on the front side. This segmentation eliminates competition for chip space and simplifies design and processing by allowing independent optimization of each subsystem.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent moves the photonics waveguide integration from the traditional planar substrate layer to the vertical dimension by bonding the optoelectronic device to the backside of the semiconductor substrate. This allows photonics components to coexist with VLSI circuitry on the front side without consuming chip real estate, effectively transitioning from 2D to 3D integration architecture.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If photonics components are integrated on the front side of the substrate, then integration is achieved, but metallization structures are interfered with

Engineering Contradiction:
Improveintegration of photonics componentsVSAvoidinterference with metallization structures
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent moves the photonics waveguide integration from the traditional planar substrate layer to the vertical dimension by bonding the optoelectronic device to the backside of the semiconductor substrate. This allows photonics components to coexist with VLSI circuitry on the front side without consuming chip real estate, effectively transitioning from 2D to 3D integration architecture.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach saves real estate on VLSI circuits by isolating photonics components from VLSI circuitry, enabling closer integration without interfering with metallization structures, thus enhancing the efficiency of VLSI design and processing.

Implementation Method 1

a photonics layer formed on the barrier layer, the photonics layer including a core for transmission of light and a cladding layer encapsulating the core and including a different index of refraction than the core

Methodology Applied
Scientific EffectTotal internal reflection: Total Internal Reflection

Data Source

PatentUS10605985B2Integration of bonded optoelectronics, photonics waveguide and VLSI SOI
Publication Date: 2020.03.31 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10605985B2 patent drawing
  • US10605985B2 patent drawing
  • US10605985B2 patent drawing

AI summary

An optoelectronic device includes an integrated circuit including electronic devices formed on a front side of a semiconductor substrate. A barrier layer is formed on a back side of the semiconductor substrate. A photonics layer is formed on the barrier layer. The photonics layer includes a core for transmission of light and a cladding layer encapsulating the core and including a different index of refraction than the core. The core is configured to couple light generated from a component of the optoelectronic device.