Semiconductor Backside Doping Profile for Lower Contact Resistance
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Solution Overview
Problem
Current semiconductor devices face challenges in improving electrical properties, particularly in the back surface side region of the semiconductor substrate, where the n-type impurity density distribution is not optimally graded, affecting the performance of devices like IGBTs.
Innovation Solution
The semiconductor device incorporates a specific atomic density distribution profile in the back surface side region, featuring a gentle gradient, steep gradient, peak, and decrease region, achieved through ion implantation and laser annealing, which optimizes the dopant distribution and activation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ion implantation and laser annealing are used to form a BOX profile, then dopant distribution and activation are optimized, but the manufacturing process complexity increases
Solution Approach 1:
The patent divides the dopant distribution into distinct regions (gentle gradient region, steep gradient region, peak region, decrease region) with specific atomic density characteristics. This segmentation allows precise control of carrier implantation in different depth zones, optimizing electrical properties while managing manufacturing complexity through structured process design
Solution Approach 2:
The patent employs laser annealing to fundamentally change the physical state and distribution parameters of dopants in the back surface side region. By controlling laser parameters (energy density, pulse duration, wavelength), the atomic density distribution is precisely adjusted to achieve the desired BOX profile with gentle and steep gradient regions, transforming the dopant activation state without mechanical intervention
2Productivity
If a steep atomic density gradient is formed near the surface, then carrier implantation efficiency is enhanced, but surface scratch impact increases
Solution Approach 1:
The patent creates different atomic density gradient characteristics at different locations and depths: a gentle gradient near the surface (0-0.5μm) to minimize scratch impact, transitioning to a steep gradient region (0.5-2μm depth) to enhance carrier implantation efficiency. This local quality variation allows simultaneous optimization of surface robustness and bulk carrier injection performance
Solution Approach 2:
The gentle gradient region acts as a cushioning zone that absorbs and distributes the impact of surface scratches before they reach the critical steep gradient region. This pre-positioned gradient structure protects against leakage current increases caused by surface defects, allowing the steep gradient to function effectively for carrier implantation without being compromised by surface quality issues
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances carrier implantation efficiency and reduces the impact of surface scratches, leading to improved electrical properties and reduced contact resistance, while preventing leakage current increases.
Implementation Method 1
a top surface of the semiconductor substrate is melted by a laser beam
Implementation Method 2
the semiconductor substrate is laser annealed from the back surface side
Implementation Method 3
achieved through ion implantation and laser annealing
Data Source
AI summary
Provided is a semiconductor device comprising: a drift region of a first conductivity type which is provided in a semiconductor substrate having a front surface and a back surface; and a back surface side region of the first conductivity type or a second conductivity type which is provided on a back surface side of the semiconductor substrate relative to the drift region in the semiconductor substrate and has a higher atomic density than the drift region.