Backside Fly Capacitor Charge Pump Layout for Lower Ripple
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Solution Overview
Problem
As semiconductor technology nodes scale down, the area occupied by capacitors in charge pump circuits becomes a critical issue, squeezing the available space for other device features and increasing parasitic resistance, which affects the performance and efficiency of voltage boosting.
Innovation Solution
The charge pump circuit design includes switches formed on the frontside of a semiconductor substrate and capacitors on the backside, allowing for a reduced total area and lower parasitic resistance, with capacitors formed by backside interconnect structures that provide lower resistance and reduce voltage ripple.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If capacitors are placed on the frontside of the substrate with switches, then the circuit connectivity is simplified, but the total area occupied by the charge pump circuit increases and parasitic resistance increases
Solution Approach 1:
The patent applies dimensionality change by moving capacitors from the frontside (2D plane) to the backside of the substrate, utilizing the third dimension (depth/thickness) to resolve the area conflict. This allows switches and capacitors to be spatially separated while maintaining electrical connectivity through substrate vias, thereby reducing the frontside area occupation without increasing circuit complexity
2Device complexity
If capacitors are placed on the frontside of the substrate with switches, then the circuit connectivity is simplified, but parasitic resistance increases affecting voltage boosting performance
Solution Approach 1:
By relocating capacitors to the backside of the substrate, the patent reduces the current path length and parasitic resistance associated with frontside interconnects. The vertical via connections provide lower resistance paths compared to lateral frontside routing, thereby improving voltage boosting performance while maintaining circuit connectivity through the substrate
3Adaptability or versatility
If more device features are integrated on the frontside, then the functionality is enhanced, but the area available for capacitors is reduced
Solution Approach 1:
The patent resolves this area conflict by moving capacitors to the backside of the substrate, effectively doubling the available area for capacitor placement. This dimensionality change allows the frontside to be fully utilized for high-density device features while the backside accommodates capacitors, thereby enhancing overall device functionality without compromising capacitor area
4Productivity
If technology nodes are scaled down, then production efficiency is increased and costs are lowered, but the area occupied by capacitors becomes more critical
Solution Approach 1:
As technology nodes scale down, the patent's backside capacitor placement becomes increasingly valuable by effectively doubling the available area. This dimensionality change allows capacitors to maintain adequate size even in scaled-down processes, supporting continued production efficiency and cost reduction while addressing the critical area constraint
Data Source
AI summary
A semiconductor device includes a first switch, a second switch, a third switch, and a fourth switch formed on a first side of a substrate, wherein the first switch and the second switch are connected in series between a first reference voltage and an output voltage, and wherein the third switch and the fourth switch are connected in series between the first reference voltage and a second reference voltage. The semiconductor device includes a capacitor formed on a second side of the substrate opposite to the first side, and having a first terminal and a second terminal. The first terminal is coupled to a first node between the first and second switches, and the second terminal is coupled to a second node between the third and fourth switches.