Apparatus Without Intermediate Ac Conversion TRIZ Cases

Reverse-biasing the low-side transistor isolation layer before switching cuts reverse recovery charge and improves buck converter efficiency.

Controlled transistor charging of a holdup capacitor suppresses surge current and power oscillation while enabling smaller SOA FETs.

A compensation resistor adds a zero to a three-pole charge pump circuit, improving output voltage stability and overall conversion reliability.

Output-current thresholds switch a hybrid voltage converter between parallel and sequential conduction to improve conversion efficiency.

A flying capacitor and switched-capacitor stage create bipolar AMOLED supply rails with continuous current, better cross-regulation, and faster response.

Moving fly capacitors to the substrate backside frees frontside area and lowers parasitic resistance and voltage ripple in charge pumps.

Two pump circuits use separate reference voltages in staged operation to raise supply voltage quickly while limiting ripple.

A lower-potential well connection through a load circuit cuts BOX capacitance impact, improving switched-capacitor efficiency without extra area.

Switching between a charge pump and DC-DC path cuts charging time while reducing energy loss and high-temperature battery operation.

A single-stage multi-phase series capacitor buck converter cuts switching losses and inductance for efficient 1-V processor power delivery.

A charge pump regulates the bypass NFET gate voltage to cut on-resistance, improve bypass-mode efficiency, and extend battery life.

A switched-capacitor bootstrap keeps the bootstrap voltage stable in PFM high-impedance mode without extra low-side switching losses.

Controllable switches let adjacent voltage regulators share routing and decoupling resources, cutting low-TDP power loss and extending battery run time.

Forced PWM switching in a memory power control circuit stabilizes DC/DC output after low-power exit, preventing initialization failures.

A passive switched capacitor charge pump amplifies low-frequency physiological signals while cutting battery drain and preamplifier noise.

A flying capacitor and load capacitor let one boost converter deliver dual-polarity OLED output with continuous current and faster transient response.

Assist switches and capacitors keep gate-source voltage high under heavy load, preventing switch cutoff and output voltage drop.

Back-to-back protection switching enables a non-isolated bidirectional converter to improve efficiency and power density while limiting short-circuit current.

Switching a flying capacitor between coupled winding paths enables scalable DC conversion ratios with soft switching, lower RMS stress, and high power density.

A master-slave current-summing scheme lets stackable converter controllers sequence extra phases while maintaining current balance and synchronization.

Optimized transformer winding and flying-capacitor layout enables 5:1 or 8:1 step-down conversion with lower loss, smaller size, and better regulator reliability.

Two pump circuits with different drive phases boost supply voltage quickly, then hold it with lower ripple in semiconductor memory.

A two-stage switching and regulating converter adapts to input voltage variation to keep digital circuits powered without shutdowns.

PWM control identifies the phase with the largest current deviation and adjusts duty to balance channels and stabilize output voltage.

An inductor-coupled switched-capacitor topology soft charges flying capacitors to achieve high step-down conversion with lower loss and ripple.

Voltage and current are captured during constant radio power draw to calculate conductor resistance and adjust converter output as load changes.

A zero-voltage switching network in a hybrid buck converter cuts switching loss and current spiking while sustaining high step-down conversion.

Complementary multi-stage pumping boosts memory voltages above supply while keeping capacitor stress within input limits to improve reliability.

A controller detects long storage and applies sub-rated voltage to reform the bus capacitor, cutting leakage current and avoiding external tools.

Switchable flying and storage capacitors generate fractional or integer output voltages with lower power use and less EMI.

Staggered dead time lets one switched capacitor circuit power the load while the other transitions, cutting ripple voltage and power loss.

Switching a flying and reservoir capacitor between series and parallel states stabilizes voltage, cuts loss, and reduces inductor ripple.

Precharging the PMOS Nwell and sequencing supply timing prevents latch-up in a charge-pump LDO while preserving low noise and high PSR.

A modified three-level buck mode adds intermediate voltage phases to cut peak inductor current, switching loss, and light-load power loss.

Double injection modifies ramp and error voltages so a power converter holds output voltage steady during input line transitions.

A feedback regulation circuit and output filter cut charge pump response delay and suppress voltage ripple for stable non-volatile memory supply.

A controller switches between always-on and switched-capacitor converters to cut sleep-mode quiescent loss while keeping efficient power delivery.

Multiple capacitive branches and an inductor stage create selectable voltage rails for regulated output across a wide input range with lower PCB area.

Time-shifted stacked drivers and interleaved converter cells cut overshoot, ripple, and transistor count while preserving efficiency and power density.

A green-mode controller cuts digital control power and phase activity at light loads while keeping multi-phase converters stable and efficient.

Detection circuitry flags when DCM/PFM switching falls below FMIN, and a current sink corrects frequency under light-load and PVT variation.

A negator stage feeds negative input voltage into a switched-capacitor converter to raise VCR with fewer stages and lower power loss.

An OR circuit and dual-source conversion path keep control loads powered from a battery or capacitor, preventing resets during abnormal conditions.

A current mirror limits short-circuit current in a charge pump by adjusting transistor drive from capacitor terminal voltage changes.

A negator stage with an H-bridge and flying capacitor boosts switched-capacitor converter ratio without adding stages or complexity.

By regulating the error amplifier input to ground and adding a parallel capacitor, this case cuts output noise without divider gain.

Measures inductor current from transistor on-phase sensing and switched-capacitor averaging to avoid dead-time errors in DC-DC converters.