Memory Power Control Using Forced PWM for Stable Initialization

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Solution Overview

Problem

Memory systems experience failures in initialization due to large variations in supply voltage when transitioning from a low power consumption mode to a normal operation mode, particularly affecting components sensitive to voltage fluctuations.

Innovation Solution

Implementing a power control circuit that transitions DC/DC converters to a forced pulse width modulation mode upon exiting the low power consumption mode, ensuring stable voltage during initialization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the memory system exits from low power consumption mode to normal operation mode, then power consumption is increased and normal operation is restored, but large variations in supply voltage occur causing initialization failures

Engineering Contradiction:
Improveinitialization successVSAvoidsupply voltage stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The DC/DC converter dynamically switches between different operation modes (PFM and PWM) based on the operational state of the memory system. During exit from low power mode, the converter operates in PWM mode to provide stable voltage for initialization, then transitions to PFM mode during normal operation for efficient power consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the operational parameters of the DC/DC converter by forcing PWM mode during the transition period from low power mode to normal operation mode. This parameter change ensures stable voltage supply during initialization while maintaining the ability to switch to energy-efficient modes during normal operation.

Inventive Principle:
Principle #35Parameter changes

2Stability of the object's composition

If DC/DC converter operates in normal mode during low power consumption mode, then voltage stability is maintained, but power consumption increases

Engineering Contradiction:
Improvesupply voltage stabilityVSAvoidpower consumption
Core Design Contradiction:
Stability of the object's compositionVSUse of energy by moving object

Solution Approach 1:

The DC/DC converter dynamically adapts its operation mode based on system state. During low power consumption mode, the converter operates in PFM mode to minimize energy usage. Upon detecting exit from low power mode, it transitions to PWM mode to ensure voltage stability during initialization, thus dynamically optimizing the trade-off between power consumption and voltage stability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention implements periodic mode switching where the DC/DC converter alternates between PFM and PWM modes based on operational requirements. The converter uses PFM during normal low power operation and switches to PWM during transitions from low power mode to ensure proper initialization, creating a periodic pattern of operation that balances efficiency and reliability.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Prevents initialization failures by maintaining stable voltage levels, allowing components like the PCIe PHY to perform calibration and initialization correctly.

Implementation Method 1

A first DC/DC converter of the one or more DC/DC converters transitions to a forced pulse width modulation mode in response to the memory system that has transitioned from a low power consumption mode to a normal operation mode

Methodology Applied
Scientific EffectPulse width modulation: Phase Modulation

Data Source

PatentUS12476545B2Memory system and power control circuit
Publication Date: 2025.11.18 KIOXIA CORP
  • US12476545B2 patent drawing
  • US12476545B2 patent drawing
  • US12476545B2 patent drawing

AI summary

According to one embodiment, a memory system connectable to a host includes a nonvolatile memory, a controller, and a power control circuit. The controller controls the nonvolatile memory. The power control circuit controls power to be supplied to the controller and the nonvolatile memory and includes one or more DC/DC converters. The nonvolatile memory and the controller include one or more circuit blocks. Each of the one or more DC/DC converters supplies an internal power supply voltage to one of the one or more circuit blocks. A first DC/DC converter of the one or more DC/DC converters transitions to a forced pulse width modulation mode in response to the memory system that has transitioned from a low power consumption mode to a normal operation mode.