Multi-Phase Series Capacitor Buck Converter for Low-Loss 1-V Regulation
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Solution Overview
Problem
Conventional power delivery systems in high-performance computing require multiple down-conversion stages to achieve the necessary 1-V DC for processors, leading to inefficiencies and challenges in managing switching losses and inductance, especially at high power levels.
Innovation Solution
A single-stage multi-phase series capacitor buck converter operating at the boundary between continuous conduction mode and discontinuous conduction mode, utilizing parallel phase blocks and embedded inductors to minimize switching losses and inductance, enabling efficient power delivery with high power density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If multiple down-conversion stages are used to achieve 1-V DC for processors, then the voltage conversion is achieved, but switching losses and inductance management become inefficient and challenging at high power levels
Solution Approach 1:
The patent merges multiple down-conversion stages into a single-stage multi-phase series capacitor buck converter. This consolidation eliminates intermediate conversion stages, reducing the number of switches and inductors required, thereby decreasing switching losses and simplifying the overall device structure while maintaining the ability to achieve 1-V DC output for processors
Solution Approach 2:
The patent segments the single-stage converter into multiple parallel phase blocks, where each phase block contains series capacitor buck converter circuits. This segmentation allows for distributed current handling and reduced per-phase inductance requirements, improving efficiency at high power levels while maintaining a single-stage architecture
2Reliability
If conventional buck converters operate in continuous conduction mode, then stable voltage regulation is achieved, but inductance requirements increase and power density decreases
Solution Approach 1:
The patent changes the operating parameters by designing the converter to operate at the boundary between continuous conduction mode (CCM) and discontinuous conduction mode (DCM). This parameter change allows for significantly reduced inductance values compared to conventional CCM operation, while maintaining stable voltage regulation through the multi-phase parallel architecture that ensures continuous current supply to the output
3Power
If inductance is reduced for high power density, then power density increases, but switching losses and control complexity increase
Solution Approach 1:
The patent segments the power conversion function into multiple parallel phase blocks, each handling a portion of the total power. This segmentation allows each phase to use smaller inductors for high power density while the parallel combination maintains stable output. The distributed architecture also spreads switching events across phases, reducing peak switching losses and easing control requirements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves zero switching losses, allows for higher frequencies with wide-bandgap transistors, reduces inductance requirements, and enhances power density, making it suitable for high-performance computing systems with seamless integration of embedded inductors and capacitors.
Implementation Method 1
a single-stage multi-phase series capacitor buck converter
Implementation Method 2
Each phase block can include plural inductors
Data Source
AI summary
Embodiments relate to a voltage regulator. The voltage regulator can include plural phase blocks. The plural phase blocks can include a single-stage multi-phase series capacitor buck converter configured to operate at a boundary between continuous conduction mode and discontinuous conduction mode.