Backside-Coupled Isolation Doping in Semiconductor Layouts
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Solution Overview
Problem
Existing semiconductor device structures require additional areas for conductive traces to couple with doped regions, which reduces the size of active regions and affects performance.
Innovation Solution
A semiconductor device structure with a doped region of a second conductive type under an isolation feature, where a conductive feature extends from the backside surface to electrically couple with the doped region, allowing for increased active region size and improved performance by transmitting voltage from the backside surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conductive traces are used to transmit supply voltage to doped regions, then electrical coupling is achieved, but additional area is consumed which reduces active region size
Solution Approach 1:
The patent introduces a vertical conductive feature that extends from the first surface through the substrate to the doped region, utilizing the third dimension (depth) to achieve electrical coupling. This eliminates the need for lateral conductive traces on the surface, thereby preserving active region area while maintaining reliable electrical connection.
2Reliability
If doped regions are used to electrically isolate adjacent transistors, then electrical isolation is achieved, but conductive traces are required which consume additional area
Solution Approach 1:
The invention uses a vertical conductive feature penetrating through the substrate to supply voltage to the doped isolation region. This vertical approach replaces traditional lateral conductive traces, reducing the horizontal space required and increasing the overall device area available for active regions.
3Reliability
If conductive traces are extended to reach doped regions, then electrical connection is established, but the complexity of the device structure increases
Solution Approach 1:
The patent extracts the conductive connection function from the lateral trace layer and relocates it to a vertical feature extending through the substrate. This separation simplifies the surface layout by removing the need for complex trace routing while maintaining the essential electrical connection function through a straightforward vertical structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration increases the size of active regions and enhances the performance of semiconductor devices by reducing the need for conductive traces on the active surface, thereby improving electrical isolation and efficiency.
Implementation Method 1
The first conductive feature extends between the first surface of the first substrate and the first doped region
Implementation Method 2
The first doped region includes a second conductive type different from the first conductive type... configured to generate a PN junction so as to electrically isolate adjacent transistors
Data Source
AI summary
A semiconductor device structure including a doped region under an isolation feature is provided. The semiconductor device structure includes a first substrate, a first well region, a first gate structure, a second gate structure, a first doped region, and a first conductive feature. The substrate has a first surface and a second surface opposite to the first surface. The first well region is in the first substrate. The first well region has a first conductive type. The first gate structure is disposed on the second surface. The second gate structure is disposed on the second surface. The first doped region includes a second conductive type different from the first conductive type. The first doped region is disposed between the first gate structure and the second gate structure. The first conductive feature extends between the first surface of the first substrate and the first doped region.