Backside MTJ Integration for Low-Current MRAM Switching
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Solution Overview
Problem
Traditional spin torque transfer magnetoresistive random access memory (STT-MRAM) faces challenges with high voltage and current-density requirements, leading to high write error rates and low speed switching due to large write switching current and select transistor limitations in magnetic tunnel junction (MTJ) based devices.
Innovation Solution
The integration of a 1T-1MTJ MRAM bit-cell with metal on both sides (MOBS) using Giant Spin Hall Effect (GSHE) Spin Orbit Torque (SOT) Switching, where a magnetic tunnel junction is placed on the backside of a silicon substrate with a transistor on the front side, decoupling write and read paths and utilizing GSHE materials for efficient spin injection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional STT-MRAM is used with conventional MTJ based devices, then non-volatile embedded memory functionality is achieved, but high write error rates and low speed switching occur due to large write switching current requirements
Solution Approach 1:
The patent places the MTJ device on the backside of the silicon substrate while keeping the transistor on the front side, creating a three-dimensional integration architecture. This spatial separation allows independent optimization of write and read paths, enabling the write path to be optimized for low current operation while the read path maintains traditional performance characteristics.
Solution Approach 2:
The patent decouples the write and read paths into separate physical routes through the substrate. The write path goes through the backside MTJ contact, while the read path uses the front side transistor control, allowing each path to be independently optimized for its specific function without interference from the other.
2Reliability
If large write switching current is used in conventional MTJ based devices, then magnetic switching is achieved, but high voltage and current-density problems occur
Solution Approach 1:
The patent introduces an intermediate magnetic layer structure in the MTJ device that mediates the switching process. This intermediate layer enables magnetic switching at lower current densities by providing a more efficient spin transfer torque mechanism, reducing the energy required for switching while maintaining reliability.
Solution Approach 2:
The patent modifies the MTJ device parameters including the magnetic layer composition, thickness, and anisotropy to enable switching at lower current densities. By changing these physical parameters, the device achieves reliable magnetic switching with reduced voltage and current density requirements compared to conventional MTJ devices.
3Reliability
If select transistor requirements are increased to provide sufficient spin current, then magnetic switching is achieved, but cell size limitation occurs
Solution Approach 1:
By moving the MTJ device to the backside of the substrate, the patent creates vertical space utilization that reduces the horizontal footprint of the cell. This three-dimensional arrangement allows the same functional components to occupy less planar area, enabling smaller cell sizes while maintaining sufficient spin current delivery.
Solution Approach 2:
The patent merges the write and read functions into a more compact configuration where the backside MTJ contact serves both functions. This integration reduces the number of separate components required, thereby reducing the overall cell area while maintaining the necessary spin current for reliable switching.
4Reliability
If conventional MTJ based devices are used, then non-volatile memory functionality is achieved, but tunneling current causes reliability issues
Solution Approach 1:
The patent extracts the harmful tunneling current path from the main device operation by using a separate backside contact for the MTJ. This separation allows the tunneling current to be contained and managed independently, reducing its harmful effects on device reliability while preserving the non-volatile memory functionality.
Solution Approach 2:
The backside substrate contact acts as an intermediary that mediates the tunneling current path. By routing the tunneling current through this intermediate backside contact rather than through the front side transistor, the harmful effects are reduced and the device reliability is improved.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables low programming voltages, reduced write error rates, faster switching times (less than 10 ns), and higher current injection for ultra-fast switching behavior, improving the density and reliability of MRAM devices.
Implementation Method 1
utilizing GSHE materials for efficient spin injection
Implementation Method 2
Giant Spin Hall Effect (GSHE) Spin Orbit Torque (SOT) Switching
Data Source
AI summary
A memory device comprises a substrate having a front side and a backside, wherein a first conductive line is on the backside and a second conductive line is on the front side. A transistor is on the front side between the second conductive line and the substrate. A magnetic tunnel junction (MTJ) is on the backside between the first conductive line and the substrate, wherein one end of the MTJ is coupled through the substrate to the transistor and an opposite end of the MTJ is connected to the first conductive line, and wherein the transistor is further connected to the second conductive line on the front side.