Back-Side Nanoribbon Removal for Uniform Multi-Stack Transistors
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Solution Overview
Problem
The challenge in fabricating nanoribbon transistors is the difficulty in achieving uniformity in geometry due to width-dependent process differences, leading to issues in forming nanoribbons with varying widths for high-performance and low-power applications.
Innovation Solution
The implementation of back-side nanoribbon removal techniques, which involve forming stacks of nanoribbons from one side and then removing one or more nanoribbons from the opposite side, allowing for the fabrication of transistors with channel regions in fewer or more nanoribbons, thereby addressing the width-dependent challenges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If nanoribbons are formed with varying widths to address different application requirements, then adaptability is improved, but manufacturing precision deteriorates due to width-dependent process differences
Solution Approach 1:
The nanoribbon stack is segmented by selectively removing specific nanoribbons from the stack. This segmentation allows different regions of the semiconductor structure to have different numbers of nanoribbons, enabling customization for high-performance versus low-power applications while maintaining uniform fabrication processes for the initial stack formation
Solution Approach 2:
Instead of forming different width nanoribbons directly through width-dependent processes, the invention inverts the approach by forming a uniform stack first and then selectively removing nanoribbons. This reverse methodology achieves geometric variation through removal rather than formation, eliminating width-dependent process differences
2Adaptability or versatility
If the number of nanoribbons in a stack is varied for different transistor performance requirements, then adaptability is improved, but device complexity increases
Solution Approach 1:
The uniform nanoribbon stack is formed in advance using a single standardized process. This preliminary action simplifies the overall fabrication by separating the uniform formation step from the subsequent selective removal step, reducing the complexity of the formation process itself
Solution Approach 2:
Different regions of the semiconductor structure are given different local qualities by selectively removing nanoribbons from specific stacks. This allows high-performance regions to have more nanoribbons while low-power regions have fewer, without requiring complex global process variations
Data Source
AI summary
Fabrication methods for integrated circuit (IC) structures and devices involving back-side nanoribbon removal are described herein. In one example, back-side nanoribbon removal involves providing stacks of nanoribbons from a first side of an IC structure, followed by removing one or more of the nanoribbons from a second side that is opposite the first side. In one example, an IC structure fabricated with back-side nanoribbon removal techniques may include a first stack of nanoribbons over a support and a second stack of nanoribbons over the support, where the number of nanoribbons in the first stack is less than in the second stack. A first transistor includes first channel regions in the nanoribbons of the first stack and a second transistor includes second channel regions in the nanoribbons of the second stack. Therefore, in one such example, the first transistor has channel regions in fewer nanoribbons than the second transistor.