Backside Image Sensor Pixel Structure for Charge Transfer Efficiency
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Solution Overview
Problem
Back-side illuminated image sensor pixels face disadvantages in their charge transfer devices, particularly in terms of charge transfer efficiency and potential trapping of photogenerated charges.
Innovation Solution
The design includes a doped photosensitive region and a charge collection region in a semiconductor substrate, with a vertical stack of a transfer gate and electric insulation wall that penetrates deeper than the charge collection region, and a vertical electric insulation structure that laterally delimits the photosensitive region, allowing for improved charge transfer and reduced potential minima during charge transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional charge transfer device is used in back-side illuminated pixels, then the device structure is simple, but charge transfer efficiency is poor and photogenerated charges may be trapped
Solution Approach 1:
The patent transitions from a planar charge transfer gate to a vertical stack configuration where the transfer gate extends through the substrate thickness. This vertical arrangement in the third dimension enables efficient charge transfer from the back-side photosensitive region to the front-side collection region without requiring complex lateral routing, thus improving charge transfer efficiency while maintaining structural compactness
Solution Approach 2:
The patent introduces an electric insulation wall as an intermediary element between the vertical transfer gate and the substrate. This insulation wall prevents unwanted charge trapping and leakage at the gate-substrate interface, ensuring reliable charge transfer. The intermediary structure addresses the reliability issue without significantly increasing overall device complexity
2Reliability
If the transfer gate penetrates deeper into the substrate, then charge transfer efficiency improves, but manufacturing complexity increases
Solution Approach 1:
The patent forms the electric insulation wall in advance before creating the vertical transfer gate. This preliminary action establishes a defined interface and prevents charge trapping sites from the outset. By preparing the insulation structure first, the subsequent gate formation can proceed with standard etching depths without requiring excessive precision, as the insulation wall already defines the functional boundary
Solution Approach 2:
The electric insulation wall serves as a mediator that decouples the gate depth requirement from manufacturing precision constraints. The insulation wall provides a clear physical and electrical boundary that defines where the gate needs to extend, making the depth control more straightforward during fabrication while still achieving deep penetration for efficient charge transfer
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances charge transfer efficiency by preventing charge trapping and improving the transfer of photogenerated charges from the photosensitive region to the charge collection region, addressing the limitations of existing back-side illuminated pixels.
Implementation Method 1
a vertical transfer gate and a vertical electric insulation wall, the stack crossing the substrate and being in contact with the charge collection region, the gate being arranged on the upper surface side of the substrate and penetrating into the substrate deeper than the charge collection region
Implementation Method 2
When light is received by the photosensitive area, electron-hole pairs are generated in the photosensitive region
Implementation Method 3
a vertical electric insulation wall, the stack crossing the substrate and being in contact with the charge collection region
Data Source
AI summary
The present disclosure concerns an image sensor including a plurality of pixels, each including: a doped photosensitive region of a first conductivity type extending vertically in a semiconductor substrate; a charge collection region more heavily doped with the first conductivity type than the photosensitive region, extending vertically in the substrate from an upper surface of the substrate and being arranged above the photosensitive region; and a vertical stack including a vertical transfer gate and a vertical electric insulation wall, the stack crossing the substrate and being in contact with the charge collection region, the gate being arranged on the upper surface side of the substrate and penetrating into the substrate deeper than the charge collection region.