Backside Power Rail Air Gap Layout for Parasitic Capacitance Reduction
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Solution Overview
Problem
The increasing demand for lower power consumption, higher performance, and smaller area in semiconductor devices leads to challenges in reducing parasitic capacitance, which degrades the performance of backside power rail (BPR) semiconductor devices due to the introduction of parasitic capacitance between the gate structure and dummy front-side S/D contact structures.
Innovation Solution
The implementation of an air gap between the second S/D region and the gate structures in BPR semiconductor devices, achieved by removing the dummy metal contact and silicide layer through an opening in the capping structure, reduces the parasitic capacitance and improves device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dummy front-side S/D contact structures are introduced in BPR semiconductor devices, then device performance is improved, but parasitic capacitance between gate structure and dummy contact structures increases
Solution Approach 1:
The patent extracts and removes the harmful dummy front-side S/D contact structures that generate parasitic capacitance. By eliminating these dummy structures, the source of parasitic capacitance is removed while maintaining the necessary functionality through alternative design approaches.
Solution Approach 2:
The patent introduces an intermediary structure (the air gap) between the gate structure and the dummy back-side S/D contact structures. This air gap acts as a mediator that reduces the parasitic capacitance coupling while allowing the dummy structures to remain in place for their intended function.
2Productivity
If device dimensions are scaled down to meet higher storage capacity and processing speed demands, then performance is improved, but manufacturing complexity increases
Solution Approach 1:
The patent inverts the conventional approach by placing power rails on the backside of the substrate rather than the front side. This inversion allows for simplified manufacturing processes at scaled dimensions while maintaining high performance, as the backside routing avoids complex front-side interconnect layers.
Data Source
AI summary
The present disclosure describes a method to form a backside power rail (BPR) semiconductor device with an air gap. The method includes forming a fin structure on a first side of a substrate, forming a source/drain (S/D) region adjacent to the fin structure, forming a first S/D contact structure on the first side of the substrate and in contact with the S/D region, and forming a capping structure on the first S/D contact structure. The method further includes removing a portion of the first S/D contact structure through the capping structure to form an air gap and forming a second S/D contact structure on a second side of the substrate and in contact with the S/D region. The second side is opposite to the first side.