Back-Side Partial-Substrate Power Rails Without TSV Stress

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Solution Overview

Problem

Conventional semiconductor fabrication processes face challenges with introducing power and signal routing on the wafer back-side, including localized stress effects, interference with back-side circuit elements, and processing difficulties with through-silicon via interconnects, leading to resistance, capacitance, and power consumption issues.

Innovation Solution

The integration of conductive back-side ground and power-distribution conductors with partial-substrate rail structures, integrated with back-side decoupling capacitors, using femtosecond laser-anneal processes to form patterned conductive implant regions, and filling trench openings with conductive layers to maximize power and ground distribution while providing EMI shielding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If through-silicon via (TSV) interconnects are used to create back-side power routing, then power delivery capability is improved, but localized stress effects and processing difficulty increase

Engineering Contradiction:
Improvepower delivery capabilityVSAvoidprocessing difficulty
Core Design Contradiction:
PowerVSEase of manufacture

Solution Approach 1:

The patent extracts the power routing function from the substrate interior (TSV approach) and relocates it to the substrate back-side surface through partial-substrate rails. This extraction eliminates the need for complex through-silicon vias while maintaining power delivery capability, resolving the contradiction between power delivery improvement and manufacturing ease.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of routing power through the substrate thickness (front-side to back-side via TSV), the patent inverts the approach by creating power rails on the back-side surface that extend laterally. This inversion transforms the vertical power delivery path into a lateral surface path, avoiding TSV processing complexity while maintaining effective power distribution.

Inventive Principle:
Principle #13The other way round (Inversion)

2Power

If through-silicon via (TSV) interconnects are used to create back-side power routing, then power delivery capability is improved, but localized stress effects increase

Engineering Contradiction:
Improvepower delivery capabilityVSAvoidlocalized stress effects
Core Design Contradiction:
PowerVSStress or pressure

Solution Approach 1:

The patent extracts the stress-inducing TSV structures and replaces them with surface-level partial-substrate rails. By taking out the deep substrate penetration approach, the design eliminates localized stress concentrations around TSV openings while preserving the power delivery function through lateral rail structures.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent inverts the power routing geometry from vertical (through-substrate) to lateral (surface-level). This inversion replaces stress-concentrating TSV holes with distributed partial-substrate rails that extend along the back-side surface, thereby reducing localized stress effects while maintaining power delivery capability.

Inventive Principle:
Principle #13The other way round (Inversion)

3Device complexity

If conductive interconnects are placed on the wafer front-side, then signal routing is simplified, but resistance and power consumption increase

Engineering Contradiction:
Improvesignal routing simplicityVSAvoidpower consumption
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent moves power routing from the traditional two-dimensional front-side metallization plane to the three-dimensional back-side substrate surface. This dimensional transition allows power rails to be positioned closer to active devices through the substrate thickness, reducing current path length and associated RC losses, while signal routing remains on the front-side without added complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces resistance, capacitance, and power consumption, enhances EMI shielding, and allows for three-dimensional multi-die packaging by aligning and connecting chips effectively, while avoiding keep-out-zones and stress concerns associated with through-silicon vias.

Implementation Method 1

using femtosecond laser-anneal processes to form patterned conductive implant regions

Methodology Applied
Scientific EffectLaser annealing: Annealing

Data Source

PatentUS20260047423A1Semiconductor circuit with back-side partial-substrate power rails
Publication Date: 2026.02.12 NXP USA INC
  • US20260047423A1 patent drawing
  • US20260047423A1 patent drawing
  • US20260047423A1 patent drawing

AI summary

A back-side ground and power-distribution network is formed on a semiconductor wafer substrate by selectively etching first and second back-side partial-substrate rail (PSR) trench openings through a back-side surface of the wafer substrate, selectively forming a plurality of defined n-type conductive regions and defined p-type conductive regions in the wafer substrate at the bottoms of the first and second back-side PSR trench openings in position for electrical contact with n-well and p-well regions, and then forming first and second back-side PSR conductors in the first and second back-side PSR trench openings to be directly electrically connected over the plurality of defined n-type conductive regions and defined p-type conductive regions to the n-well and p-well regions in the wafer substrate.