Backside Voltage Regulator Layout for ASIC Power Loss Reduction

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Solution Overview

Problem

As ASIC dies increase in processing speed, they consume more power, leading to increased heat and potential failure due to copper losses in traditional power delivery methods, which can cause solder electromigration and reduced performance.

Innovation Solution

Integration of an integrated voltage regulator die within the ASIC package, utilizing a backside power distribution network with through-silicon vias and a redistribution layer to reduce copper losses by regulating power delivery and incorporating deep trench capacitors for efficient power management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional copper power delivery methods are used to support high processing speeds, then power delivery capability is improved, but copper losses increase causing heat and electromigration failure

Engineering Contradiction:
Improveprocessing speedVSAvoidcopper losses
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

An integrated voltage regulator die is introduced as an intermediary component between the power source and the ASIC die. This regulator die receives power through through-mold vias and distributes regulated power to the ASIC die through through-silicon vias, mediating the power delivery to reduce copper losses and improve efficiency while supporting high processing speeds.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If traditional power delivery methods are used, then power distribution is simplified, but electromigration failure risk increases

Engineering Contradiction:
Improvepower distribution complexityVSAvoidelectromigration failure risk
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The power distribution architecture transitions from a planar copper-based distribution to a three-dimensional structure utilizing through-mold vias and through-silicon vias. This vertical dimensionality change enables more efficient power delivery paths, reducing current density in horizontal copper traces and thereby reducing electromigration failure risk while maintaining manageable complexity through standardized via structures.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If power consumption is increased to support higher processing speeds, then processing capability is improved, but heat generation increases causing component failure

Engineering Contradiction:
Improveprocessing capabilityVSAvoidheat generation
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The voltage regulator die changes the electrical parameters of power delivery by providing regulated voltage output. This parameter transformation enables efficient power delivery with reduced current requirements, thereby reducing I²R losses and heat generation while maintaining the processing capability needed for high-speed operation.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution reduces copper losses, minimizes the risk of electromigration failure, and enhances power efficiency by controlling power consumption and maintaining consistent power draw, thereby improving thermal performance and processing speed.

Implementation Method 1

the TSVs and redistribution layer form an inductor

Methodology Applied
Scientific EffectInductance: Inductor

Implementation Method 2

deep trench capacitors embedded into the silicon layer or stacked on the silicon layer for use by the integrated voltage regulator die

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS11830855B2Backside integrated voltage regulator for integrated circuits
Publication Date: 2023.11.28 GOOGLE LLC
  • US11830855B2 patent drawing
  • US11830855B2 patent drawing
  • US11830855B2 patent drawing

AI summary

The technology relates to an integrated circuit (IC) package. The IC package may include a packaging substrate, an IC die, and an integrated voltage regulator die. The IC die may include a metal layer and a silicon layer. The metal layer may be connected to the packaging substrate. The integrated voltage regulator die may be positioned adjacent to the silicon layer and connected to the packaging substrate via one or more through mold vias or through dielectric vias. The IC die may be an application specific integrated circuit (ASIC) die.