Backside RF Shielding for ICs Using TSVs
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Solution Overview
Problem
The challenge in the electronics industry is to provide effective RF shielding for integrated circuits without increasing the device thickness, especially in compact portable electronic devices where space is limited, while also accommodating the integration of multiple electronic devices on a single silicon wafer.
Innovation Solution
The solution involves using through silicon vias (TSVs) to couple thin-film conductive shields to the IC power/ground connections, which are either defined during wafer processing or as a post-process, allowing for the integration of RF shielding, capacitors, inductors, and resistors on the underside of the IC without adding thickness, and can be connected to both the topside and underside of the active device region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If traditional external RF shielding is used, then RF interference protection is improved, but device thickness increases
Solution Approach 1:
The patent implements RF shielding by nesting conductive layers within the existing IC structure. Through-silicon vias (TSVs) are formed through the substrate, and conductive shielding layers are deposited on the backside of the substrate, effectively nesting the shielding function within the device itself rather than adding external shielding components that would increase thickness.
Solution Approach 2:
The patent transitions from traditional planar shielding approaches to a three-dimensional implementation using vertical TSV structures. The shielding is achieved by creating conductive paths in the vertical dimension (through the substrate thickness) and configuring shielding layers on the backside, utilizing the Z-dimension to provide RF protection without increasing the overall device footprint or effective thickness.
2Adaptability or versatility
If more electronic devices are integrated per wafer area, then device functionality is improved, but manufacturing complexity increases
Solution Approach 1:
The TSV structure serves multiple functions simultaneously: it provides electrical connections for active devices, enables RF shielding through conductive lining, and can serve as interconnect structures for multiple layers. This multi-functionality reduces the need for separate manufacturing processes for each function, thereby managing complexity while enhancing device capabilities.
Solution Approach 2:
The patent combines several manufacturing steps into integrated processes. The TSV formation process is merged with the shielding implementation, where the same via structures that provide electrical interconnection are also used to establish RF shielding paths. Additionally, multiple shielding layers can be combined in a single deposition process, reducing overall manufacturing complexity.
Data Source
Figure 1A~1B
Figure 2A~2B
Figure 2C~2E
AI summary
Consistent with an example embodiment, there is an integrated circuit device (IC) built on a substrate of a thickness. The IC comprises an active device region of a shape, the active device region having topside and an underside. Through silicon vias (TSVs) surround the active device region, the TSVs having a depth defined by the substrate thickness. On the underside of and having the shape of the active device region, is an insulating layer. A thin-fil conductive shield is on the insulating layer, the conductive shield is in electrical contact with the TSVs.