Backside S/D Contacts Without Inner Spacers or Corner Etch Damage
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Solution Overview
Problem
Backside power delivery in semiconductor fabrication poses challenges, particularly in protecting source/drain (S/D) layers during etching without inner spacers, leading to damage at the corners of these layers.
Innovation Solution
A method involving selective etching and filling of recesses with dielectric material to form backside contacts to S/D regions, using conformal extension regions of silicon germanium to protect these layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If backside power delivery is implemented without inner spacers, then manufacturing cost is reduced and fabrication is simplified, but source/drain layer corners are damaged during etching
Solution Approach 1:
The method performs preliminary actions by forming conformal extension regions of silicon germanium on the source/drain layers before the substrate etching process. These extension regions are deposited to cover and protect the vulnerable corner areas of the source/drain layers, preventing etchant access and subsequent damage during the backside power delivery fabrication process.
Solution Approach 2:
The conformal extension regions of silicon germanium serve as intermediary protective layers between the etchant and the source/drain layers. These extension regions act as a buffer that selectively resists the etching process, allowing the substrate to be removed for backside power delivery while the source/drain layers remain protected from damage.
2Power
If substrate is etched from back side for power delivery, then power delivery efficiency is improved, but source/drain layer corners are exposed to damage
Solution Approach 1:
The conformal extension regions are formed in advance before the backside substrate etching process. This preliminary protective action ensures that when the etchant is applied to remove the substrate for backside power delivery access, the source/drain layer corners are already shielded and cannot be damaged by the etching process.
Solution Approach 2:
The method converts the potentially harmful etching process into a beneficial outcome by using the etchant selectively. The etchant removes the substrate to enable backside power delivery while the conformal extension regions protect the source/drain layers, thus transforming a harmful process into a useful one that achieves both substrate removal and layer protection.
3Reliability
If conformal extension regions are formed to protect source/drain layers, then layer integrity is maintained, but additional fabrication steps are required
Solution Approach 1:
The conformal extension regions are formed by changing the material parameter - depositing silicon germanium instead of the standard silicon material. This material parameter change provides both the protective function and the necessary etch selectivity, allowing the extension regions to protect the source/drain layers while being distinguishable to the etching process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively forms backside contacts while preserving the integrity of S/D layers, enabling efficient backside power delivery without damaging the corners, thus supporting advanced semiconductor manufacturing.
Implementation Method 1
etching a substrate selectively to shallow trench isolations (STIs) and the S/D regions to form first recesses
Implementation Method 2
filling the first recesses with first dielectric material
Data Source
AI summary
A method of forming backside contacts to source/drain (S/D) regions of a semiconductor structure includes removing a substrate selectively to shallow trench isolations (STIs) and the extension regions to form first recesses between the STIs, filling the first recesses with first dielectric material, forming second recesses aligned to the S/D regions through the first dielectric material, and forming backside contacts to the extension regions within the second recesses.


