Backside Trench Capacitor CMOS Image Sensor for HDR Without Pixel Area Loss
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Solution Overview
Problem
Conventional CMOS image sensors face issues with blooming in high-light conditions and insufficient contrast in low-light conditions due to limited full-well capacity and signal-to-noise ratio, exacerbated by dual conversion gain designs that compress layout area and reduce photodiode space.
Innovation Solution
A CMOS image sensor with a trench capacitor is designed on the backside of the substrate, connected via a through-silicon via, allowing for high dynamic range capture without occupying frontside layout space, and incorporating a dual conversion gain mechanism to balance light and dark scenes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If dual conversion gain design is implemented with external capacitor, then high dynamic range image capture is achieved, but layout area is compressed and photodiode space is reduced
Solution Approach 1:
The patent moves the capacitor from the frontside layout plane to the backside of the substrate, utilizing the third dimension (depth/vertical space) to resolve the area conflict. The capacitor is formed in a trench structure on the backside, connected to the floating diffusion region through a through-silicon via, thereby achieving dual conversion gain functionality without occupying frontside photodiode space.
2Adaptability or versatility
If dual conversion gain design is implemented with external capacitor, then high dynamic range image capture is achieved, but photodiode space is reduced
Solution Approach 1:
The patent relocates the capacitor to the backside of the substrate, separating it from the photodiode area on the frontside. This spatial separation in different dimensions allows the photodiode to maintain its full area for light sensing while the capacitor provides the necessary storage function for dual conversion gain operation.
3Device complexity
If conventional CMOS image sensor is used, then simple structure is maintained, but blooming phenomenon occurs in high-light conditions
Solution Approach 1:
The patent introduces a capacitor as an intermediary element between the photodiode and the readout circuitry. This capacitor acts as a buffer to store excess electrons generated in high-light conditions, preventing them from overflowing into adjacent pixels and causing blooming, while maintaining overall system simplicity.
4Device complexity
If conventional CMOS image sensor is used, then simple structure is maintained, but insufficient signal-to-noise ratio occurs in low-light conditions
Solution Approach 1:
The capacitor serves as an intermediary storage element that accumulates electrons from the photodiode. In low-light conditions, this allows for longer integration times and better electron collection, improving the signal-to-noise ratio without requiring complex additional structures or changing the basic sensor architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves high dynamic range imaging by preventing electron overflow in bright conditions and enhancing signal-to-noise ratio in low-light conditions, maintaining image quality and sensitivity across varying lighting environments.
Implementation Method 1
Each pixel includes transistors, capacitors and photodiodes, wherein electrical energy is induced in the photodiode upon exposure to the luminous environment. Each pixel generates electrons proportional to an amount of light entering the pixel.
Implementation Method 2
a trench capacitor in a capacitor trench extending from the backside into the substrate
Data Source
AI summary
A CMOS image sensor is provided in the present invention, including a transfer gate on the frontside of substrate, a photodiode in the substrate at one side of the transfer gate, a floating diffusion region in the substrate close to the frontside at another side of the transfer gate, a trench capacitor in a capacitor trench extending from the backside into the substrate, and a TSV penetrating the substrate, wherein the floating diffusion region is connected with the TSV through a frontside interconnect, and the trench capacitor is connected with the TSV through a backside interconnect.