Balanced Offset Compensation Circuit for Differential Amplifiers

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Solution Overview

Problem

Traditional offset compensation techniques for differential amplifiers suffer from unbalanced leakage currents, leading to accumulation of differential voltage on input terminals and circuit malfunction, especially during long compensation periods, and require disabling the input signal during auto-zeroing phases, limiting continuous time operation.

Innovation Solution

The implementation of three switches between each input and output of the differential amplifier, which are controlled to reduce differential degradation by opening and closing combinations during auto-zeroing and operation phases, ensuring balanced biasing and minimizing leakage currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the input offset voltage is stored across a series capacitor during an auto-zeroing phase, then the input offset voltage compensation is achieved, but unbalanced leakage currents cause accumulation of differential voltage on the amplifier input terminals over time resulting in circuit malfunction

Engineering Contradiction:
Improveoffset compensation accuracyVSAvoidcircuit stability during long compensation periods
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent introduces asymmetry by adding a leakage compensation circuit that is selectively activated during the auto-zeroing phase. This compensation circuit intentionally creates an unbalanced path to counteract the unbalanced leakage currents, thereby preventing differential voltage accumulation while maintaining effective offset compensation.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The leakage compensation circuit acts as an intermediary element between the series capacitor and the amplifier input terminals. It mediates the harmful effect of leakage currents by providing a compensating current path that balances the overall circuit behavior during the compensation phase.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If switching circuits are closed to configure the differential amplifier as a unity gain buffer during auto-zeroing phase, then offset compensation is achieved, but the input signal must be disabled during this phase limiting continuous time operation

Engineering Contradiction:
Improveoffset compensationVSAvoidcontinuous time operation capability
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent segments the operation into distinct phases (auto-zeroing phase and signal processing phase) using switching circuits. During the auto-zeroing phase, the amplifier is configured as a unity gain buffer for offset compensation, while during the signal processing phase, the amplifier processes input signals. This segmentation allows each phase to optimize its function without interfering with the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements periodic switching between auto-zeroing and signal processing phases. The switching circuits are controlled to periodically alternate between closing (for offset compensation) and opening (for signal processing), enabling the system to achieve both accurate offset compensation and continuous time operation through rhythmic phase transitions.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS7394309B1Balanced offset compensation circuit
Publication Date: 2008.07.01 NAT SEMICON CORP
  • US7394309B1 patent drawing
  • US7394309B1 patent drawing
  • US7394309B1 patent drawing

AI summary

Balanced offset compensation is provided for a differential amplifier circuit. Two sets of three switches are employed between respective inputs and outputs of the differential amplifier to shunt the outputs to the input terminals during auto-zeroing phase. By opening and closing different combinations of the switches during auto-zeroing and operation phases, differential degradation due to unbalanced leakage currents is substantially reduced.