Bandgap Thermal Sensor DEM Switches With Gate Leakage Reduction
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Solution Overview
Problem
Bandgap thermal sensors, particularly those using core-MOS DEM chopper switches, are susceptible to undesirable leakage currents, which affect power efficiency and reliability, especially in high-voltage designs.
Innovation Solution
Implementing a leakage reduction circuit that controls gate leakage by using stacked-gate structures and digital control signals to minimize gate-to-source voltage, thereby reducing leakage currents in core-MOS DEM circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If chopper switches with DEM technology are used in bandgap thermal sensors, then signal quality is improved, but gate leakage current increases
Solution Approach 1:
The gate control is segmented into multiple independent switches (first switch and second switch) that can be independently controlled. This allows the gate to be fully disconnected from the source during non-operational phases, preventing leakage paths while maintaining signal quality during active phases through DEM technology
Solution Approach 2:
The control circuit preliminarily determines whether the switch is in a first state or second state before operation, and accordingly controls the gate connection state in advance. This preliminary action ensures the gate is properly disconnected before leakage can occur, while maintaining signal integrity when needed
2Use of energy by moving object
If gate-to-source voltage is reduced to minimize leakage, then power efficiency improves, but switching control complexity increases
Solution Approach 1:
A control circuit acts as an intermediary between the DEM control signals and the switch gates. This intermediary intelligently determines the appropriate gate connection state based on switch operational requirements, reducing leakage current while managing control complexity through automated decision-making logic
3Reliability
If stacked-gate structures are used to control leakage, then reliability improves, but device area increases
Solution Approach 1:
The gate control function is segmented across multiple switches rather than using a single complex stacked-gate structure. Each switch has its own gate controlled independently, achieving reliable leakage control through distributed architecture that minimizes total device area while maintaining high reliability
Data Source
AI summary
Systems and methods are provided for a circuit comprising an operating voltage node, a current mirror circuit, and a dynamic element matching (DEM) circuit. The current mirror circuit is coupled to the operating voltage node and comprises a plurality of resistive devices. The current mirror circuit is configured to generate a bias current over the plurality of resistive devices. The DEM circuit comprises a plurality of DEM transistors coupled to the current mirror circuit. The DEM circuit is configured to switch the bias current through one or more of the plurality of DEM transistors. The DEM circuit includes a leakage reduction circuit configured to reduce a gate current of the one or more of the plurality of DEM transistors and is configured to generate a DEM output current based on the bias current and the gate current.