Bandpass NS-SAR ADC for Non-Contiguous Carrier Aggregation
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Solution Overview
Problem
Conventional receiver circuitry in wireless communication devices for processing non-contiguous intra-band carrier aggregated RF signals consumes significant power and occupies substantial chip area due to the need for dedicated receiver paths for each component carrier.
Innovation Solution
A single receiver path architecture with bandpass analog-to-digital converter (ADC) circuitry using noise-shaping successive approximation register (NS-SAR) paths and low-gain amplifiers, where the local oscillator frequency is set between the center frequencies of the component carriers, and digital IF circuitry performs downconversion to baseband, reducing power consumption and chip area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated receiver paths are used for each component carrier in non-contiguous intra-band carrier aggregation, then signal processing capability is improved, but power consumption and chip area increase significantly
Solution Approach 1:
The patent merges multiple dedicated receiver paths into a single shared receiver path. The bandpass ADC with noise-shaping architecture processes multiple component carriers sequentially through time-interleaved sampling, eliminating the need for separate receiver paths for each carrier while maintaining signal processing capability.
Solution Approach 2:
The bandpass ADC is designed with multi-functionality to handle multiple component carriers. By using noise-shaping successive approximation register (NS-SAR) paths and setting the local oscillator frequency between carrier centers, a single ADC can process multiple carriers that would traditionally require separate dedicated paths.
2Reliability
If dedicated receiver paths are used for each component carrier in non-contiguous intra-band carrier aggregation, then signal processing capability is improved, but chip area increases substantially
Solution Approach 1:
The patent merges multiple dedicated receiver paths into a single shared receiver path. The bandpass ADC with noise-shaping architecture processes multiple component carriers sequentially through time-interleaved sampling, eliminating the need for separate receiver paths for each carrier while maintaining signal processing capability.
Solution Approach 2:
The bandpass ADC is designed with multi-functionality to handle multiple component carriers. By using noise-shaping successive approximation register (NS-SAR) paths and setting the local oscillator frequency between carrier centers, a single ADC can process multiple carriers that would traditionally require separate dedicated paths.
3Measurement precision
If conventional baseband ADCs are used for each receiver path, then quantization accuracy is maintained, but power consumption and device complexity increase
Solution Approach 1:
The patent changes the operating parameters of the ADC by using noise-shaping successive approximation register (NS-SAR) architecture with a bandpass transfer function. This allows the ADC to operate at lower resolution (e.g., 6-bit) while maintaining effective quantization accuracy through noise shaping that pushes quantization noise out of the signal band.
Solution Approach 2:
The patent converts the harmful effect of quantization noise by using noise-shaping techniques. The NS-SAR architecture shapes the quantization noise spectrum, pushing noise energy to frequencies outside the signal band, thereby transforming what would be a detrimental effect into a manageable characteristic that can be filtered out.
Data Source
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AI summary
Methods and apparatus for providing bandpass analog to digital conversion (ADC) in RF receiver circuitry of a wireless-communication device. The bandpass ADC includes first noise-shaping successive approximation register (NS-SAR) circuitry arranged in a first path and second NS-SAR circuitry arranged in a second path parallel to the first path, wherein the first and second NS-SAR circuitries are configured to alternately sample an analog input voltage at a particular sampling rate and to output a digital voltage at the particular sampling rate.