Banked Cache Memory Segregation for Multiprocessor Snoop Traffic
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Solution Overview
Problem
In multiprocessor environments, snoopy buses used for cache synchronization lead to increased snoop traffic, reducing effective cache access bandwidth and limiting system performance due to interference between shared and non-shared data cache accesses.
Innovation Solution
Implementing a banked cache management method where cache accesses are directed to specific banks based on access type indicators, separating shared and non-shared data accesses to reduce interference, using an access control circuit to steer cache accesses to designated banks for either shared or non-shared data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If snoopy buses are used for cache synchronization in multiprocessor environments, then cache coherency is maintained, but effective cache access bandwidth is reduced due to snoop traffic interference
Solution Approach 1:
The cache memory is divided into multiple independently accessible banks. Snoop traffic and locally generated traffic are directed to different banks, allowing simultaneous access without interference. This segmentation enables parallel operation of snoop and local accesses, maintaining cache coherency while preserving effective access bandwidth.
2Productivity
If multi-ported cache memory is used to separate snoop traffic and local traffic, then cache access interference is reduced, but cache size, power consumption, and expense significantly increase
Solution Approach 1:
Instead of adding multiple ports (spatial dimension), the patent uses a banked cache structure where different traffic types are routed to different banks. This transforms the problem from a port-based solution to a bank-based solution, achieving traffic separation without increasing port count, cache size, or power consumption.
Data Source
AI summary
In a multiprocessor system, accesses to a given processor's banked cache are controlled such that shared data accesses are directed to one or more banks designated for holding shared data and/or non-shared data accesses are directed to one or more banks designated for holding non-shared data. A non-shared data bank may be designated exclusively for holding non-shared data, so that shared data accesses do not interfere with non-shared accesses to that bank. Also, a shared data bank may be designated exclusively for holding shared data, and one or more banks may be designated for holding both shared and non-shared data. An access control circuit directs shared and non-shared accesses to respective banks based on receiving a shared indication signal in association with the accesses. Further, in one or more embodiments, the access control circuit reconfigures one or more bank designations responsive to a bank configuration signal.