Microcontroller detects charger insertion and wakes the CPU to adjust current, solving sleep mode power trade-offs.
Performance state control adjusts processor voltage and frequency based on real-time workload characteristics.
A partition power policy wizard calculates processing units allotment for logical partitions based on user-defined adherence settings.
A link health monitor detects signal degradation in aggregation links and places affected ports into disabled states to prevent data transmission errors.
Distributed servers monitor peer processing loads to autonomously start or stop power supplies, resolving reliability risks from central controller failures.
Switching between regulated and unregulated voltages reduces interface noise during active operations while lowering standby power consumption.
A power-saving system disables trackball motion sensors and the display screen to conserve battery energy in handheld communication devices.
A server rack system lowers power consumption or shuts down nodes when power supply units fail to output normal voltage.
Interleaved storage circuits distribute data bits across multiple banks to enable parallel lane access, reducing register bank complexity and power consumption.
A compute cluster scheduler allocates resources to jobs using a balanced distribution policy that assigns minimum requirements and desired priorities.
Segmenting error detection and tag comparison logic accelerates cache hit status determination while reducing integrated circuit real estate.
Segmenting ports and applying dynamic control reduces power consumption while maintaining network reliability.
A mobile communication device uses an Inter-RAT idle roaming timer to measure a count period from the WCDMA service cut-off time.
Timing controller disables column drivers during vertical blanking periods, reducing power consumption while maintaining display refresh capability.
A multi-core system modulates individual core frequencies using phase locked loops and local power units to manage performance states.
Segmenting PDCCH monitoring to the primary carrier reduces UE power consumption and false alarm rates during semi-persistent scheduling.
A programmable clock controller adjusts bus frequency based on master device requests to balance performance and power.
A card reader processor detects memory card insertion and displays data contents using standby power from a portable electronic apparatus.
A data communication protocol negotiates SMB versions to enable compound commands and multi-channel transfers.
A network-on-chip timing power estimating device calculates transmission timings to determine circuit states for accurate power consumption analysis.
Controller segments solid state memory into independent zones to initialize components in parallel, reducing boot-up time without compromising capacity.
A slave node switch blocks reception signals via a prohibition signal from the master ECU to maintain sleep mode.
Segmenting total energy measurements by thread execution time isolates individual software power consumption for targeted optimization.
Client device transmits suspend request to host device, reducing power consumption during idle periods.
Virtual desktops segment interfaces to reduce operational complexity and time consumption during emergency dispatch.
A power sourcing equipment generates distinct voltage levels to exchange data with a powered device via common-mode transmission.
A data processing system uses dynamic voltage scaling to reduce leakage current while maintaining state retention.
Bandwidth throttling enables lower voltage operation in C1E states while maintaining compatibility with standard LFM levels upon exit.
A hard disk control device intercepts access commands during idle periods to enable power saving modes.
Frame slicing schedules frequency scanning between burst arrivals, eliminating continuous monitoring to lower power consumption during handover.
Tunable monitoring circuitry adjusts operating parameters based on signal propagation delay to optimize power consumption in data processing systems.
Segmented command placement configurations accommodate clock speed mismatches between controllers and memory devices while maintaining timing requirements.
Dynamic migration of virtual machines based on real-time temperature data reduces thermal hotspots and lowers cooling costs in densely packed data centers.
An embedded subsystem controller switches power states based on the main computer status to conserve energy.
A processor control system adjusts performance ramp rates based on power capping status to manage energy consumption.