Processor Power Management Using Adaptive Ramp Rates

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Solution Overview

Problem

Current power capping and performance management systems in computer systems often operate independently, leading to oscillations and power spikes when interacting, as they do not synchronize their state changes effectively, causing inefficiencies and exceeding power thresholds.

Innovation Solution

Implementing a communication mechanism between the power capping and performance management systems, where the performance management system adjusts its control algorithm based on whether the power capping system is throttling, using different ramp rates to manage processor performance states, ensuring synchronized interactions and preventing power spikes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If power capping and performance management systems operate independently, then each system can be optimized for its particular needs, but the systems may interact and enter an astable state causing oscillations and power spikes

Engineering Contradiction:
Improvesystem optimization flexibilityVSAvoidpower usage stability
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The performance management system receives feedback about power capping status from the power capping system and adjusts its control algorithm accordingly. When power capping is active, the performance management system uses a first control algorithm with a reduced ramp rate, and when power capping is not active, it uses a second control algorithm with a higher ramp rate. This feedback mechanism prevents oscillations and power spikes while maintaining system optimization flexibility.

Inventive Principle:
Principle #23Feedback

2Speed

If the performance management system uses a fast ramp rate to quickly respond to performance needs, then system responsiveness is improved, but power spikes may occur when interacting with the power capping system

Engineering Contradiction:
Improveresponse speedVSAvoidpower spikes
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The performance management system dynamically adjusts its ramp rate based on the power capping status. The system switches between two different control algorithms with different ramp rates depending on whether power capping is active or not. This dynamic adaptation allows the system to respond quickly to performance needs when power is available, while preventing power spikes when power capping is active.

Inventive Principle:
Principle #15Dynamics

3Reliability

If the power capping system quickly throttles performance to reduce power draw, then power threshold compliance is improved, but system performance degradation increases

Engineering Contradiction:
Improvepower threshold complianceVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The performance management system anticipates power capping actions by monitoring the power capping status and adjusting its control algorithm in advance. When power capping is detected, the system preemptively reduces its ramp rate to match the power capping system's throttling action, preventing excessive performance degradation and maintaining smoother power transitions.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8479034B2Controlling the power usage of a computer
Publication Date: 2013.07.02 HEWLETT PACKARD ENTERPRISE DEV LP
  • US8479034B2 patent drawing
  • US8479034B2 patent drawing
  • US8479034B2 patent drawing

AI summary

A method and apparatus for controlling the power usage of a processor is disclosed. The power usage of the processor is monitored. When the power usage of the processor exceeds a threshold power usage value, the power used by the processor is reduced or limited. A processor utilization value is also monitored. When the processor utilization value is above a threshold utilization value, the processor is ramped to a higher performance state. When power to the processor is being limited, a first rate is used to ramp the processor to the higher performance state. When power to the processor is not being limited, then a second rate, different from the first rate, is used to ramp the processor to the higher performance state.