Host Interface Voltage Regulation for Memory Noise and Power Trade-offs
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Solution Overview
Problem
Data storage devices face challenges in power management, particularly in portable electronic devices, where multiple voltage domains increase complexity and power consumption, leading to noise interference and reduced battery life due to the use of regulators for supply voltage generation.
Innovation Solution
A data storage device employs a selective supply voltage delivery technique, using either a regulated or unregulated supply voltage for the host interface based on the operational mode of the non-volatile memory, reducing noise and power consumption by disconnecting the supply voltage to the memory during standby mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a regulator is used to generate a supply voltage for the interface to the controller, then noise at the interface is reduced, but power consumption increases
Solution Approach 1:
The patent implements dynamic voltage supply by selectively switching between regulated and unregulated supply voltages based on the operational state of the non-volatile memory. During active operations (read/write), the regulated supply voltage is provided to reduce noise. During standby mode, the unregulated supply voltage is provided to reduce power consumption. This dynamic adaptation resolves the contradiction between noise reduction and power consumption.
Solution Approach 2:
The patent changes the parameter of supply voltage characteristics (regulated vs. unregulated) based on operational requirements. By monitoring the operational state of the non-volatile memory and adjusting the supply voltage characteristics accordingly, the system optimizes the trade-off between noise performance and power consumption.
2Use of energy by moving object
If multiple voltage domains are used in an integrated circuit, then power consumption is reduced, but device complexity increases
Solution Approach 1:
The patent makes a single supply voltage circuit serve multiple functions by selectively providing regulated or unregulated voltage based on operational mode. Instead of having separate voltage regulation paths for different operational states, the system uses one supply voltage circuit that adapts its characteristics dynamically, reducing the number of voltage regulators needed while maintaining power efficiency.
3Device complexity
If a common supply voltage is shared by both interfaces, then device complexity is reduced, but noise interference occurs at one interface due to switching operations
Solution Approach 1:
The patent segments the supply voltage provision for different interfaces based on operational requirements. The host interface receives regulated supply voltage when the non-volatile memory is active to prevent noise interference, while the controller interface shares the common supply voltage. This segmentation of voltage supply quality resolves the noise interference problem while maintaining relatively simple device architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances power management by reducing noise and power consumption, thereby improving battery life and simplifying device design by minimizing the need for multiple voltage regulators.
Implementation Method 1
Certain data storage devices utilize a regulator, such as a linear voltage regulator, to generate a supply voltage for the interface to the controller instead of 'sharing' a common supply voltage for both of the interfaces.
Data Source
AI summary
A data storage device includes a non-volatile memory and a host interface. A method includes supplying a first supply voltage to the host interface during a first mode of operation of the non-volatile memory. The method further includes supplying a second supply voltage to the host interface in response to a transition from the first mode of operation to a second mode of operation of the non-volatile memory.


