Link Aggregation Group Deterministic Routing via Port Protocol Combination

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current link aggregation technologies cannot determinately route packets to the correct server port when a port is assigned to multiple link aggregation groups, leading to inefficient packet forwarding due to the inability to distinguish between different LAGs based on standard approaches.

Innovation Solution

Defining a link aggregation group (LAG) by the identity of a physical port and one or more packet parameters, such as VLAN identity, source or destination MAC address, or IP address, allows for the determination of a logical port's membership in a specific LAG, enabling a single physical port to be part of multiple LAGs and enabling deterministic packet forwarding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a port is assigned to multiple link aggregation groups using standard approaches, then the port can participate in multiple LAGs, but the packet forwarding becomes non-deterministic and inefficient

Engineering Contradiction:
Improveport membership in multiple LAGsVSAvoidpacket forwarding efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent segments the LAG identification by introducing a LAG identifier field in packet headers. This allows the network to distinguish between different LAGs traversing the same physical port, enabling deterministic packet forwarding while maintaining port membership in multiple LAGs. The segmentation of LAG identification at the packet level resolves the conflict between port versatility and forwarding efficiency.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If standard link aggregation protocols are used, then LAG establishment is simplified, but the ability to determinately route packets to correct server ports is lost

Engineering Contradiction:
ImproveLAG establishmentVSAvoidpacket routing precision
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent introduces a LAG identifier as an intermediary element in packet headers that bridges the gap between simplified LAG establishment and precise packet routing. This intermediary field carries specific LAG identification information through the network, enabling routers to make precise routing decisions without complicating the LAG establishment process. The LAG identifier acts as a mediator that preserves both ease of operation and routing precision.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If packets are load balanced across multiple LAGs, then bandwidth utilization is improved, but deterministic packet delivery to specific server ports cannot be guaranteed

Engineering Contradiction:
Improvebandwidth utilizationVSAvoiddeterministic packet delivery
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent adds another dimension to packet forwarding by incorporating LAG identifier fields in packet headers. This additional dimension allows the network to maintain load balancing across multiple LAGs for bandwidth utilization while simultaneously ensuring deterministic packet delivery through the LAG identifier that guides packets to the correct server ports. The dimensionality change enables both bandwidth optimization and delivery reliability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9363167B2Link aggregation based on port and protocol combination
Publication Date: 2016.06.07 DELL MARKETING CORP
  • US9363167B2 patent drawing
  • US9363167B2 patent drawing
  • US9363167B2 patent drawing

AI summary

A network switch suitable for receiving packets of information from and the packets of information to a communications network includes a plurality of physical ports, packet processing functionality and memory. The packet processing functionality operates on information stored in memory to determine the LAG, from among two or more LAGs, over which a packet received by the switch should be correctly forwarded. The switch memory stores a plurality of LAG tables, each one of which can include one or more entries comprising a physical port number and a packet parameter that are used by the packet processing functionality to determinately identify the correct LAG over which to forward a packet.