Driver-Assisted BAR Mapping for PCIe Storage Aggregation
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Solution Overview
Problem
Conventional computer bus systems face challenges in maintaining drive integrity and implementing boot sequencing for multi-device volumes, as they expose internal configurations to users, leading to mis-configuration and performance limitations, especially when multiple SSDs are connected directly to the PCIe bus, which also complicates error management and processing burdens on the CPU.
Innovation Solution
The technique involves driver-assisted Base Address Register (BAR) mapping, which virtualizes PCIe functions without virtualizing storage media, allowing access to multiple SSDs through unused BARs of a master device, presenting only a single PCIe function to system software, and enabling intelligent routing decisions to aggregate storage capacity and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple SSDs are connected directly to the PCIe bus, then storage capacity and performance are increased, but device complexity and error management become more difficult
Solution Approach 1:
The patent merges multiple PCIe devices into a single virtualized device by sharing a common BAR (Base Address Register) space. The master device's BAR is used to map multiple slave devices, allowing the operating system to see and access all SSDs through a single unified interface, thereby increasing storage capacity without proportionally increasing device complexity from the OS perspective
Solution Approach 2:
The patent introduces a driver as an intermediary between the operating system and multiple PCIe devices. The driver manages the BAR mapping and routing decisions, acting as a mediator that translates single-device OS requests into multi-device access patterns, simplifying error management and reducing CPU processing burdens
2Productivity
If multiple SSDs are connected directly to the PCIe bus, then storage performance is improved, but CPU processing burden increases
Solution Approach 1:
The patent implements self-service by enabling devices to perform routing decisions autonomously through BAR mapping. The master device can redirect memory access requests to slave devices without requiring constant CPU intervention, allowing the storage subsystem to manage itself and reducing CPU processing burden while maintaining high storage performance
3Ease of manufacture
If conventional PCIe device enumeration is used, then device discovery is simplified, but boot sequencing and drive integrity become difficult to maintain
Solution Approach 1:
The patent applies preliminary action by establishing BAR mappings and routing decisions early in the boot process before devices are fully enumerated. The master device pre-configures its BAR to map slave devices, creating a stable address space layout that maintains drive integrity throughout operation while still allowing flexible device discovery
Data Source
AI summary
Techniques herein include systems and methods for driver-assisted BAR mapping that virtualize PCI functions, but without virtualizing the storage media itself. Such techniques make use of unused BARs (Base Address Registers) of a master (Operating system-facing) device to gain access to other PCIe logical instances, while still exposing only a single PCIe function (connection or channel) to system software. This technique provides a new concept of logical PCIe device instances through BAR mapping by making use of unused BARs to extend access to any number of PCIe instances or memory-mapped I/O devices behind a master device such that only a single PCIe function is exposed to system software. Embodiments can thus extend access to one or more additional storage devices through one level of BAR indirection. As a result, such techniques and embodiments enable the multiplication of storage capacity and performance through the aggregation of multiple, similar hardware components.