Bare Die Integration in Flexible Substrate via Adhesive Bonding
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Solution Overview
Problem
Traditional silicon integration methods, such as solder bonding and wire bonding, are not suitable for hybrid electronic platforms due to temperature and mechanical limitations, particularly when integrating flexible printed electronics, as they restrict the size of contact pads that can be bonded with adhesive materials.
Innovation Solution
A manufacturing process where the surface of the electronic circuit component, including contact pads, is aligned at the same level as the substrate, with a filler material bridging the gap between the component and the substrate, allowing for high-resolution patterning of conductive traces using inkjet printing or other technologies, eliminating the need for a ramp and enabling flexible integration on flexible substrates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional silicon integration methods (solder bonding, wire bonding) are used, then reliable electrical connections are achieved, but temperature and mechanical limitations prevent their use in hybrid flexible electronic platforms
Solution Approach 1:
The patent extracts the bonding function from traditional silicon integration methods and relocates it to a flexible substrate environment using adhesive bonding. The electronic circuit component is bonded directly to the flexible substrate without requiring rigid solder or wire bonding infrastructure, enabling adaptation to flexible platforms while maintaining connection reliability through specialized adhesive materials.
Solution Approach 2:
The patent changes the bonding parameters by transitioning from high-temperature solder bonding to low-temperature adhesive bonding. This parameter change enables compatibility with flexible substrates that cannot withstand traditional silicon integration temperatures, while still achieving reliable electrical connections through optimized adhesive properties.
2Adaptability or versatility
If adhesive bonding is used on flexible substrates, then flexibility is achieved, but the minimal size of contact pads limits bonding capability
Solution Approach 1:
The patent addresses the contact pad size limitation by transitioning from planar bonding to three-dimensional bonding. The adhesive material extends vertically from the substrate surface to reach the contact pads, creating a ramp structure that bridges the height difference. This dimensional change allows adhesive bonding to successfully connect to minimal-size contact pads while maintaining substrate flexibility.
Solution Approach 2:
The patent introduces adhesive material as an intermediary between the flexible substrate and the minimal-size contact pads. This intermediary substance fills the gap and creates a bonding interface that overcomes the size limitation, enabling reliable connection while preserving the flexibility of the substrate.
3Ease of manufacture
If a ramp structure is created around the component, then adhesive bonding is enabled, but the surface becomes non-planar preventing high-resolution patterning
Solution Approach 1:
The patent applies preliminary action by creating the ramp structure of adhesive material before placing the electronic circuit component. This pre-formed ramp provides a bonding surface that accommodates the component while maintaining overall surface planarity, enabling both adhesive bonding capability and high-resolution patterning on the final planar surface.
Solution Approach 2:
The patent resolves the planarity conflict by using three-dimensional adhesive material that creates a ramp structure in the vertical dimension, while the top surface remains planar in the horizontal dimension. This allows bonding to occur at the ramp interface while the upper surface maintains the flatness required for high-resolution patterning.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This process facilitates high-density, low-resistance interconnections and allows for the construction of conductive traces between the circuit components and the substrate, enhancing the packaging capabilities of hybrid electronic platforms while maintaining a flat, planar surface for further assembly.
Implementation Method 1
the front surface of the electronic circuit component, which carries electronic elements including contact pads, and the front surface of the substrate, which also carries various electronic elements, are held in an adhesive relationship by a flat material having an upper surface which includes adhesive or sticky material
Implementation Method 2
This gap is filled with a filler material, such as a bonding material. The bonding material also used to encapsulate or bond together the substrate and electronic circuit component.
Implementation Method 3
the planar flat or level upper surface can readily accept the formation of conductive traces by the use of inkjet printing or other technologies
Data Source
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AI summary
Provided is a manufacturing process for electronic circuit components such as bare dies, and packaged integrated chips, among others, where the surface of the electronic circuit component is at the same level as the associated substrate, the surface of the electronic circuit component holding connection pads. A gap exists between the electronic circuit component, and the end of an opening within the substrate. This gap is filled with a filler material, such as a bonding material. The bonding material also used to encapsulate or bond together the back side of the substrate and electronic circuit component. During the manufacturing process, the front surface of the electronic circuit component (which includes the contact pads) and the front surface of the substrate which includes electronic circuitry are held in an adhesive relationship by a flat material having an upper surface which includes adhesive or sticky material (such as PDMS). Once the flat material is removed the planar flat or level upper surface can readily accept the formation of conductive traces by the use of inkjet printing or other technologies.