Embedded Nonvolatile Memory in BCD ICs With One Extra Mask
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Solution Overview
Problem
Existing BCD integrated circuit manufacturing processes require increased masking, implantation, and annealing operations, making them costly and limiting in achieving high device density for nonvolatile memory cells.
Innovation Solution
The proposed integrated circuit manufacturing methods enable the embedding of low-cost, high-density nonvolatile memory cells in BCD integrated circuits by performing a sequence of process operations that include ion implantation, annealing, and gate formation, with no additional thermal budget, implant operations, or masks beyond the existing BCD process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing BCD manufacturing processes are used to incorporate nonvolatile memory elements, then nonvolatile memory functionality is achieved, but the number of masking, implantation, and annealing operations increases, rendering the process costly and limiting device density
Solution Approach 1:
The patent merges the nonvolatile memory formation process with the existing BCD manufacturing process by utilizing the same ion implantation and annealing operations that form bipolar devices to also create the memory tunnel oxide and nitride layers. This consolidation eliminates additional masking and implantation steps while achieving both bipolar device functionality and nonvolatile memory capability in the same process sequence.
Solution Approach 2:
The patent makes the existing BCD process steps serve multiple functions: the ion implantation operations simultaneously form bipolar device regions and create the memory stack structure, while the annealing operations concurrently heal implantation damage and densify the oxide-nitride-oxide stack for nonvolatile memory operation. This multi-functionality reduces the total number of process operations required.
2Reliability
If additional masking, implantation, and annealing operations are performed to incorporate nonvolatile memory elements, then nonvolatile memory functionality is achieved, but manufacturing cost increases
Solution Approach 1:
The patent combines the nonvolatile memory formation with existing BCD process steps, eliminating the need for separate masking, implantation, and annealing operations. The memory stack is formed using the same process operations already required for bipolar device fabrication, thereby avoiding additional manufacturing costs associated with extra process steps.
3Reliability
If additional implant operations are performed to incorporate nonvolatile memory elements, then nonvolatile memory functionality is achieved, but device density is limited
Solution Approach 1:
The patent integrates nonvolatile memory formation into the existing implant operations by using the same ion implantation steps to create both bipolar device regions and the memory tunnel oxide/nitride structure. This approach eliminates the need for additional implant operations that would consume valuable wafer real estate and reduce overall device density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the integration of nonvolatile memory cells with no additional thermal budget or implant operations, using only a single additional mask, thereby reducing costs and enhancing device density.
Implementation Method 1
performing ion-implantation of impurities through the pad oxide layer to form at least one well or buried layer in each of the multiple regions
Implementation Method 2
heating to anneal away damage from the ion-implantation concurrently with densifying the oxide-nitride-oxide stack
Data Source
AI summary
One illustrative integrated circuit manufacturing method includes: a sequence of process operations to provide bipolar devices, CMOS (complementary metal oxide semiconductor) devices, and DMOS (double-diffused metal oxide semiconductor) devices on a monolithic integrated circuit substrate; and further operations to provide nonvolatile memory cells on the monolithic integrated circuit substrate with no additional thermal budget, with no additional implant operations, and with only a single additional mask, relative to the sequence of process operations. The sequence of process operations includes one or more ion implantation operations to form wells and/or buried layers for the bipolar devices, the CMOS devices, and the DMOS devices, on a shared integrated circuit substrate; an annealing operation to heal damage from the one or more ion implantation operations before forming sources and drains for the CMOS and DMOS devices; and gate formation operations to form gates for the CMOS devices and the DMOS devices.