Bent Drive Transistor Layout for Low-Noise CMOS Image Sensors

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

CMOS image sensors face challenges in minimizing noise in the electrical signals generated by the drive transistor, particularly as the channel area decreases, which affects the quality of the images produced.

Innovation Solution

The semiconductor device incorporates a drive transistor with a bent shape and multiple source-drain regions, where the channel regions are formed in different directions, increasing the channel area and reducing noise by spacing them apart from the device isolation pattern, thereby minimizing charge trapping and noise generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the channel area of the drive transistor is decreased to reduce pixel size, then the pixel density and resolution are improved, but the noise in the electrical signal increases due to charge trapping

Engineering Contradiction:
Improvepixel sizeVSAvoidnoise in electrical signal
Core Design Contradiction:
Area of moving objectVSObject-affected harmful factors

Solution Approach 1:

The channel is configured to extend in multiple directions (first direction and second direction) rather than a single linear path, effectively utilizing two-dimensional space under the gate electrode. This multi-directional channel configuration increases the total channel area and length without increasing the pixel footprint, thereby maintaining low noise performance while achieving compact pixel size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The channel is divided into multiple segments including first and second channel regions extending in different directions, with multiple source-drain regions (first, second, third, fourth source-drain regions) distributed at different locations. This segmentation allows the channel function to be distributed across multiple paths, increasing the effective channel area while maintaining compact overall dimensions and reducing charge trapping effects.

Inventive Principle:
Principle #1Segmentation

2Object-affected harmful factors

If multiple source-drain regions are added to increase channel area, then the noise is reduced, but the device complexity increases

Engineering Contradiction:
Improvenoise in electrical signalVSAvoidtransistor structure
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

Multiple channel regions (first channel region, second channel region) and multiple source-drain regions are merged under a single gate electrode, forming an integrated multi-directional channel structure. This merging approach achieves the noise reduction benefits of increased channel area while avoiding the complexity of multiple separate transistors, as all channel segments share the same gate control.

Inventive Principle:
Principle #5Merging (Combining)

3Object-affected harmful factors

If the channel regions are spaced apart from the device isolation pattern, then charge trapping is minimized and noise is reduced, but the manufacturing precision requirements increase

Engineering Contradiction:
Improvecharge trappingVSAvoidspacing control
Core Design Contradiction:
Object-affected harmful factorsVSManufacturing precision

Solution Approach 1:

The patent applies different spatial configurations to different parts of the channel structure. The first and second channel regions are positioned at different distances from the device isolation pattern, with the first channel region extending in a first direction and the second channel region extending in a second direction. This local quality variation optimizes the spacing to minimize charge trapping while maintaining manufacturability.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20240379722A1Semiconductor device and image sensor including the same
Publication Date: 2024.11.14 SAMSUNG ELECTRONICS CO LTD
  • US20240379722A1 patent drawing
  • US20240379722A1 patent drawing
  • US20240379722A1 patent drawing

AI summary

A semiconductor device, including a gate electrode, a first region under the gate electrode and extending from a first direction to a second direction crossing the first direction, the first region having a bent shape, a first source-drain region extending from one end of the first region, a second source-drain region extending from an opposite end of the first region, and a third source-drain region at a point where a first virtual straight line extending from the first source-drain region in the first direction and a second virtual straight line extending from the second source-drain region in a direction opposite to the second direction cross each other in the first region, wherein the third source-drain region forms a first channel region together with the first source-drain region and forms a second channel region together with the second source-drain region.