BEOL Optical Interconnect Layout for Dense High-Rate IC Links
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Solution Overview
Problem
Existing integrated circuit (IC) technologies face challenges in implementing substrate integrated waveguides (SIWs) due to limitations in substrate compatibility and thermal noise interference, particularly for sub-millimeter-wave signaling, and traditional waveguides are external components that require connectors, limiting high data-rate communication in a dense and cost-effective manner.
Innovation Solution
Incorporating backend optical interconnects in backend of line (BEOL) layers with conductive interconnects, using existing structures like vias and lines, and integrating optical interconnects with shielding to enable high data-rate communication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If substrate integrated waveguides (SIWs) are implemented, then waveguide integration is improved, but substrate compatibility is limited and thermal noise interference occurs
Solution Approach 1:
The patent introduces an intermediary material layer between the waveguide structure and the substrate. This intermediate layer acts as a buffer that isolates the waveguide from direct contact with the substrate, thereby reducing thermal noise interference while maintaining substrate compatibility for sub-millimeter-wave signaling applications.
Solution Approach 2:
The patent employs composite material structures combining different dielectric materials with complementary properties. By stacking multiple material layers with specific permittivity values, the design achieves both low loss for high-frequency operation and compatibility with various substrate types, resolving the contradiction between integration performance and substrate versatility.
2Ease of manufacture
If traditional external waveguides with connectors are used, then ease of manufacture is improved, but data rate and communication density are limited
Solution Approach 1:
The patent merges the waveguide structure directly with the backend-of-line interconnect layers of the integrated circuit. By combining optical interconnects with conductive interconnects in the same BEOL layers and utilizing existing via and line structures, the design eliminates external connectors while achieving high data-rate communication through integrated photonic-electronic circuits.
Solution Approach 2:
The patent designs multi-functional interconnect structures that serve both electrical and optical signal transmission purposes. The same BEOL layer infrastructure supports both conductive and optical interconnects, enabling a unified platform that delivers high-speed communication without requiring separate external waveguide components.
3Productivity
If optical interconnects are integrated with conductive interconnects in BEOL layers, then data rate communication is improved, but manufacturing complexity increases
Solution Approach 1:
The patent leverages self-service by utilizing existing via and line structures already present in the BEOL layers for both optical and conductive interconnect functions. The fabrication process automatically forms these structures through standard semiconductor manufacturing steps, reducing the need for additional complex processing while achieving integrated photonic-electronic functionality.
Data Source
AI summary
Backend optical interconnects may be formed in backend of line (BEOL) layers together with conductive interconnects, and may enable high data-rate communication in a dense and cost-effective manner. In one example, backend optical interconnects can be formed using existing structures in the process (e.g., vias and lines). For example, an IC structure may include an interconnect layer over a device region, where the interconnect layer includes both conductive interconnects and optical interconnects (e.g., wave guides). The optical interconnect includes a core material (e.g., a dielectric material) and may be parallel to metal lines or may be a via that is orthogonal to metal lines in the interconnect layer.


