BEOL SRAM Data Backup Structure for Fast Restore and High Density

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Solution Overview

Problem

Current memory devices face challenges in efficiently restoring data without increasing the footprint of the memory cell, particularly due to the placement of data backup units in the front-end of line (FEOL) structure, which limits device density and slows down data restoration processes.

Innovation Solution

A memory device configuration where a data backup unit is positioned in the back-end of line (BEOL) structure, utilizing ferroelectric memory elements and a control device on a channel layer, allowing for faster data backup and restore operations while maintaining a compact footprint, thus enhancing device density and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the data backup unit is placed in the front-end of line (FEOL) structure, then the data backup function is integrated with the memory cell, but the device density decreases and the data restoration speed slows down

Engineering Contradiction:
Improvedata backup functionVSAvoiddevice density
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent transitions the data backup unit from the planar FEOL layer to the vertical BEOL structure, utilizing the third dimension (height/depth) to separate the backup unit spatially from the memory cell. This dimensional change allows the backup unit to be positioned above the memory cell in the vertical stack, thereby increasing device density while maintaining backup functionality.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent divides the memory device into distinct functional segments: the memory cell in the FEOL layer and the data backup unit in the BEOL structure. This segmentation allows independent optimization of each component and enables concurrent operations, improving both density and restoration speed.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the data backup unit is placed in the front-end of line (FEOL) structure, then the data backup function is integrated with the memory cell, but the data restoration speed decreases

Engineering Contradiction:
Improvedata backup functionVSAvoiddata restoration speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

By moving the backup unit to the BEOL vertical structure, the patent creates independent access paths for backup and restore operations. The control device can selectively activate backup or restore functions without interference from the other, enabling faster restoration speeds through parallel processing capabilities.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements dynamic control through a control device that can selectively enable backup or restore operations based on operational needs. This dynamic switching capability allows the system to optimize performance by performing restore operations rapidly when needed, without being constrained by backup process timing.

Inventive Principle:
Principle #15Dynamics

3Productivity

If the data backup unit is positioned in the back-end of line (BEOL) structure, then the device density increases and concurrent operations are enabled, but the structural complexity increases

Engineering Contradiction:
Improvedevice densityVSAvoidstructural complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The control device in the BEOL structure serves multiple functions: it controls both the backup operation and the restore operation, and it selectively activates the appropriate ferroelectric memory element. This multi-functionality reduces the need for separate control circuits, thereby managing structural complexity while enabling concurrent operations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent combines the backup and restore control logic into a single control device within the BEOL structure. This merging of control functions, along with the shared use of ferroelectric memory elements for both backup and restore operations, reduces overall structural complexity despite the vertical integration.

Inventive Principle:
Principle #5Merging (Combining)

4Area of stationary object

If the data backup unit is positioned in the back-end of line (BEOL) structure, then the lateral footprint is reduced, but the vertical stacking complexity increases

Engineering Contradiction:
Improvelateral footprintVSAvoidvertical stacking complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent explicitly utilizes the vertical dimension by placing the data backup unit in the BEOL structure above the memory cell. This vertical stacking approach dramatically reduces the lateral footprint while confining the complexity to the vertical dimension, where it can be managed through standardized interconnect structures and control logic.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables rapid data restoration and increased device density by separating the data backup unit from the memory cell, allowing concurrent operations and reducing the lateral footprint, thereby improving overall memory device performance.

Implementation Method 1

The first and second memory gate structures comprise an upper gate electrode over a ferroelectric layer

Methodology Applied
Scientific EffectFerroelectric polarization:

Data Source

PatentUS20240381613A1Data backup unit for static random-access memory device
Publication Date: 2024.11.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240381613A1 patent drawing
  • US20240381613A1 patent drawing
  • US20240381613A1 patent drawing

AI summary

Various embodiments of the present application are directed towards an integrated circuit including a plurality of semiconductor devices disposed on a substrate. A dielectric structure overlies the semiconductor devices. A plurality of conductive interconnect elements are disposed within the dielectric structure and are electrically coupled to one or more of the semiconductor devices. A data backup unit overlies the plurality of conductive interconnect elements. The data backup unit includes a first source/drain structure, a second source/drain structure, a channel layer laterally extending over the first and second source/drain structures, a first upper gate structure, and a second upper gate structure. The first and second upper gate structures overlie the channel layer.