BEOL Via Layout Across Adjacent Conductive Lines
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Solution Overview
Problem
The complexity of manufacturing semiconductor integrated circuits (ICs) has increased due to the scaling down process, requiring advancements in IC manufacturing to maintain efficiency and reduce costs.
Innovation Solution
The formation of an interconnect structure with a conductive via extending across adjacent conductive lines in the back-end-of-line (BEOL) of IC fabrication, utilizing a single-damascene or dual-damascene process to create electrical connections between conductive layers, enhancing manufacturing efficiency and reducing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional multi-step processes are used to form vias across conductive lines, then manufacturing precision may be maintained, but device complexity and manufacturing time increase significantly
Solution Approach 1:
The patent combines multiple manufacturing steps into a single etching operation. The via trench is etched to simultaneously expose both the first and second conductive lines, and the conductive material is deposited in one continuous process to form the via that connects both lines, eliminating the need for separate via formation steps for each conductive line
Solution Approach 2:
The via structure serves multiple functions simultaneously: it provides electrical connection to the first conductive line, electrical connection to the second conductive line, and acts as an interconnect between different conductive layers, reducing the need for separate structures for each function
2Productivity
If scaling down process is applied to increase functional density, then productivity and cost efficiency improve, but manufacturing complexity increases
Solution Approach 1:
The patent segments the via formation process from traditional multi-step sequential via formation into a single integrated etching and filling operation, where one via trench serves multiple connection purposes, thereby simplifying the manufacturing process while maintaining high functional density
Solution Approach 2:
The via structure extends in the vertical dimension to connect multiple conductive lines at different depths and lateral positions, utilizing the third dimension to achieve multiple electrical connections through a single via structure rather than requiring multiple separate via holes in the same plane
Data Source
AI summary
A semiconductor structure and method of forming the same are provided. The semiconductor structure has a conductive structure. The semiconductor structure includes a first conductive line, a second conductive line, a third conductive line and a conductive via. The first conductive line and the second conductive line are located in a first dielectric layer and extend along a first direction. The first conductive line and the second conductive line are spaced from each other by the first dielectric layer therebetween. The third conductive line is located in a second dielectric layer and extends along a second direction. The conductive via is vertically between the first conductive line and the third conductive line, and between the second conductive line and the third conductive line. The conductive via, in a vertical direction, is overlapped with a portion of the first dielectric layer that is laterally between the first conductive line and the second conductive line.