BER Test Set for Flexible Error Profile Generation

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Solution Overview

Problem

Current optical transport network test platforms lack flexibility in monitoring bit-error rate (BER) over a wide range of values for the number of bit errors (N) and time interval (T), making it difficult to evaluate system performance and generate specific BER profiles, which is critical for forward error correction (FEC) algorithms.

Innovation Solution

A test set configured to generate and output a selected BER profile, allowing for the evaluation of network performance by generating bit errors according to a user-selected profile, with the ability to connect via optical, electrical, or wireless communication, and preprogrammed profiles for common data transport standards.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If test platforms use fixed BER monitoring parameters, then the device complexity is reduced, but the adaptability to monitor BER over a wide range of N and T values is limited

Engineering Contradiction:
ImproveBER monitoring flexibilityVSAvoidtest platform complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The test platform is designed to perform multiple BER monitoring functions by accepting different combinations of N (number of bit errors) and T (time interval) parameters. The system can monitor BER for various applications including protection switching, video transport, and FEC evaluation by configuring different N and T values, making a single platform suitable for diverse testing scenarios without requiring multiple specialized devices.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If test platforms lack BER profile generation capability, then the device complexity is reduced, but the ability to evaluate FEC algorithms under specific error conditions is impaired

Engineering Contradiction:
ImproveFEC algorithm evaluation accuracyVSAvoidtest platform complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system generates predetermined BER profiles in advance with specific error distributions (such as burst errors, uniform errors, or clustered errors) to evaluate FEC algorithm performance under known conditions. By pre-configuring error patterns and their statistical characteristics, the platform can reliably assess whether FEC algorithms meet required performance standards before actual deployment.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The test platform varies key parameters including the number of bit errors N, time interval T, error distribution patterns, and error clustering characteristics to create different BER profiles. By changing these parameters systematically, the system can evaluate how FEC algorithms perform under diverse error conditions, identifying algorithms that robustly handle various error scenarios.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If BER monitoring uses fixed N and T values, then the measurement precision for specific applications is improved, but the productivity for evaluating multiple scenarios is reduced

Engineering Contradiction:
Improveevaluation efficiencyVSAvoidBER measurement accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The test platform dynamically adjusts BER monitoring parameters N and T based on the specific application requirements. For protection switching evaluation, it may use specific N and T values; for video transport assessment, it uses different values; and for FEC evaluation, it employs yet another set of values. This dynamic reconfiguration allows the system to maintain measurement precision for each application while efficiently evaluating multiple scenarios without manual reconfiguration.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20090276664A1Method and apparatus for monitoring bit-error rate
Publication Date: 2009.11.05 VERIZON PATENT & LICENSING INC
  • US20090276664A1 patent drawing
  • US20090276664A1 patent drawing
  • US20090276664A1 patent drawing

AI summary

A test set for evaluating network performance is described, and which may include an output device, a processor, a power supply, a memory unit, and a control terminal. The test set may be configured to receive a user-entered selection of one of a plurality of different bit-error rate profiles and generate a test signal exhibiting the selected bit-error rate profile. The test set may also supply the test signal exhibiting the selected bit-error rate profile to a network under test. In addition, the test set may receive as an input, an output from the network under test. The output may include the test signal exhibiting the selected bit-error rate. The test set may evaluate the received test signal and determine the performance of the network in response to the received test signal exhibiting the bit-error rate. The test set may then output the results of the evaluation.