Bias Generator for Non-Volatile Memory Voltage Stability

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Solution Overview

Problem

Non-volatile memory circuits face challenges in generating stable wordline and bitline voltages due to process and temperature variations, requiring resource-intensive solutions that impact performance.

Innovation Solution

An integrated circuit with a bias generator that includes a bias replica circuit to generate wordline bias voltages and a cascode voltage generation circuit to generate bitline bias voltages, both compensated for temperature and process variations, allowing for low voltage memory operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If current solutions are used to handle voltage variations due to temperature and process changes, then voltage stability is improved, but resource consumption increases and performance is impacted

Engineering Contradiction:
Improvevoltage stabilityVSAvoidresource consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The bias generator uses a feedback mechanism where the current through the replica memory array is automatically compared with a reference current, and the charge pump automatically adjusts the gate voltage to maintain equality between these currents. This self-regulating system compensates for temperature and process variations without requiring external control resources.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system employs a feedback loop where the current through the replica memory array is continuously monitored and compared with a reference current. The difference between these currents controls the charge pump, which adjusts the gate voltage to maintain current equality, thereby stabilizing the voltage against temperature and process variations.

Inventive Principle:
Principle #23Feedback

2Reliability

If temperature sensors and external monitoring are used to compensate for variations, then voltage stability is improved, but device complexity increases

Engineering Contradiction:
Improvevoltage stabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The bias generator creates a simplified replica of the memory array operation using a replica memory array that mimics the electrical characteristics of the main array. This replica circuit allows the system to sense and compensate for process and temperature variations without requiring complex external sensors or monitoring circuits.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The replica memory array serves as an intermediary that translates temperature and process variations into current changes. This intermediary circuit allows the feedback mechanism to indirectly sense environmental variations and adjust the gate voltage accordingly, avoiding the need for direct temperature sensing.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Power

If high analog supply voltage is used for wordline generation, then voltage generation capability is improved, but adaptability to low voltage operations is reduced

Engineering Contradiction:
Improvevoltage generation capabilityVSAvoidvoltage range adaptability
Core Design Contradiction:
PowerVSAdaptability or versatility

Solution Approach 1:

The charge pump dynamically adjusts the gate voltage based on the feedback from the current comparison. The voltage is not fixed but continuously adapted to maintain the required current equality condition, allowing the system to operate effectively across a range of supply voltages including low voltage digital ranges.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the gate voltage parameter dynamically in response to feedback signals. The charge pump modifies the voltage level according to the difference between the replica array current and reference current, enabling adaptation to different supply voltage conditions and process variations.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250054552A1Device and method to generate bias voltages in non-volatile memory
Publication Date: 2025.02.13 STMICROELECTRONICS INT NV
  • US20250054552A1 patent drawing
  • US20250054552A1 patent drawing
  • US20250054552A1 patent drawing

AI summary

The present disclosure is directed to an integrated circuit that includes a non-volatile memory (NVM). The integrated circuit includes a bias generator that produces stable wordline and bitline voltages for a reliable read operation of the NVM. This disclosure is directed to low voltage memory operations of memory read, erase verify, and program verify. The present disclosure is directed to non-volatile memory circuits that can also operate at low supply voltages in digital voltage supply range.