Biased ESD Circuit Reducing Capacitance via Negative Bulk Bias
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Solution Overview
Problem
Existing ESD protection circuits often fail to effectively reduce capacitance without altering other critical parameters, which can lead to damage from electrostatic discharge events in electronic devices.
Innovation Solution
A biased ESD circuit is configured by applying a negative bias to the bulk terminal of an ESD device, reducing the drain-to-source capacitance while maintaining the clamping nature of the ESD structure, using a charge pump to provide the bias and coupling the gate terminal to the source terminal through resistors to create an ESD discharge path.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional ESD protection circuit is used, then ESD current can be shunted to ground, but the capacitance of the ESD structure remains high which can lead to damage from electrostatic discharge events
Solution Approach 1:
The patent applies a negative bias voltage to the bulk terminal of the ESD device, changing the electrical parameter of the bulk terminal from zero bias to negative bias. This parameter change reduces the drain-to-source capacitance of the ESD device while maintaining its ESD protection function, thereby resolving the contradiction between high capacitance and effective protection.
2Object-affected harmful factors
If the capacitance of the ESD structure is reduced, then protection effectiveness is improved, but other critical parameters of the ESD structure may be altered which can compromise the clamping nature
Solution Approach 1:
The patent applies negative bias specifically to the bulk terminal of the ESD device, creating a localized electrical condition that reduces capacitance without affecting other terminals (gate, drain, source) and their critical functions. This localized parameter change maintains the clamping nature while reducing capacitance.
3Object-affected harmful factors
If additional biasing circuitry is added to reduce capacitance, then ESD protection is improved, but the device complexity increases
Solution Approach 1:
The charge pump circuit is integrated into the ESD protection structure, using the ESD device's own terminals and internal resources to generate the negative bias voltage. This self-service approach reduces capacitance without requiring external biasing circuitry, thereby minimizing the increase in device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces capacitance with minimal change in other ESD structure parameters, enhancing the protection against electrostatic discharge events without compromising the underlying ESD structure's clamping ability.
Implementation Method 1
reduce the drain terminal to source terminal capacitance of the ESD device
Implementation Method 2
A charge pump can be configured to provide a negative bias to the bulk terminal of the ESD device
Implementation Method 3
ESD is the sudden flow of charge between objects. In certain examples, ESD current can be large enough to damage electronic devices. To protect electronic devices from ESD events, various ESD protection circuits have been designed to shunt ESD current to ground
Data Source
AI summary
This document discusses, among other things, a biased electrostatic discharge (ESD) circuit and method configured to reduce capacitance of an ESD structure with little to no change in other ESD structure parameters. A bulk terminal of an ESD device can be negative biased to reduce a drain terminal to source terminal capacitance of the ESD device. A charge pump can be configured to provide a negative bias to the bulk terminal of the ESD device. In certain examples, the gate terminal of the ESD device can be coupled to the source terminal of the ESD device, such as through a resistor, and the source terminal can be coupled to ground.