Bi-directional Resistive Memory Cell for SRAM Replacement
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Solution Overview
Problem
Conventional resistive memory devices exhibit slow read and write performance and are not viable substitutes for static RAM, especially in high-performance systems, due to their minimal cell area and reliability issues in one transistor/one resistive element or one diode/one resistive element configurations.
Innovation Solution
The use of bi-directional resistive elements in non-volatile memory systems, where two resistive elements are connected in series between power supplies and can be programmed simultaneously to high and low resistive states, enabling fast and efficient read/write operations comparable to conventional SRAM, with a two-transistor read circuit and controlled wordlines for data storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If one transistor/one resistive element or one diode/one resistive element memory cell configuration is used, then cell area is minimized, but read and write performance becomes slow (approximately 30 nanoseconds or more per operation)
Solution Approach 1:
The patent divides the memory cell into multiple functional components: separate read transistor and write transistor, with the resistive element segmented into two portions (first and second portions) that can be independently controlled. This segmentation allows simultaneous read and write operations without interference, improving speed while maintaining compact area.
Solution Approach 2:
The patent introduces a temporal dimension by enabling simultaneous read and write operations through independent control of read and write transistors. The read wordline and write wordline can be activated at different times, allowing the cell to perform read and write operations in overlapping time windows, effectively doubling the operational throughput.
2Area of moving object
If one transistor/one resistive element or one diode/one resistive element memory cell configuration is used, then cell area is minimized, but reliability becomes difficult to achieve
Solution Approach 1:
The patent incorporates a read transistor that can be activated before write operations to prepare the read path, and a write transistor that can be activated before read operations to prepare the write path. This preliminary activation of appropriate transistors prevents interference and ensures reliable operation by establishing the correct circuit state before the actual read or write operation begins.
Solution Approach 2:
The patent introduces transistors as intermediary control elements between the resistive element and the read/write circuits. These transistors act as mediators that selectively connect or disconnect the resistive element from different circuit paths, preventing direct interference between read and write operations and ensuring reliable data storage and retrieval.
3Duration of action of stationary object
If conventional resistive memory devices are used, then non-volatile storage is achieved, but read/write operations occur too slowly to replace static RAM in high-performance systems
Solution Approach 1:
The patent makes the memory cell dynamically controllable by introducing independent read and write transistors with separate wordline controls. This dynamic control allows the cell to rapidly switch between read and write modes, and to perform both operations simultaneously when needed, achieving SRAM-like speed while maintaining non-volatile storage capability through the resistive element.
4Speed
If bi-directional resistive elements are used with simultaneous programming capability, then read speeds comparable to SRAM are achieved, but device complexity increases
Solution Approach 1:
The patent makes each transistor serve multiple functions: the read transistor participates in both read operations and write operations (by controlling the read path during writes), and the write transistor similarly participates in both write and read operations. The resistive element also serves dual purposes by having its two portions independently controllable. This multi-functionality reduces the need for dedicated separate circuits, managing complexity while achieving SRAM-like speeds.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for robust zero or one logic state sensing with read speeds and space requirements comparable to conventional SRAM, enabling efficient data storage and retrieval while maintaining non-volatility, thus potentially replacing SRAM and reducing the need for flash memory.
Implementation Method 1
Each of the bi-directional resistive elements can be programmed independently to a high or low resistive state... One resistive element is in a high resistive state (HRS) while the other resistive element is in a low LRS
Data Source
AI summary
A memory cell includes a first bi-directional resistive element having a cathode coupled to a first power rail and an anode coupled to an internal node, a second bi-directional resistive element having a cathode coupled to the internal node and an anode coupled to a second power rail, and a first transistor having a control electrode coupled to the internal node, a first current electrode coupled to a first bitline, and a second current electrode coupled to a third power rail.