Bidirectional I2C Repeater Switching Without Passgate Capacitance
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Solution Overview
Problem
Bidirectional serial data buses face challenges with parasitic capacitance accumulation, leading to slowed data transitions and reduced noise margins due to the use of passgates for multiplexing, which also fail to isolate capacitance between sections of the bus.
Innovation Solution
A bidirectional repeater design that employs inverting comparators and active pulldowns with adjustable voltages to isolate parasitic capacitance and eliminate the need for passgates, allowing for N:1 multiplexing without added series resistance, thereby maintaining full noise margins and reducing voltage drop.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If passgates are used for multiplexing data signals on bidirectional bus, then data routing between multiple devices is enabled, but parasitic capacitance accumulates and transition speeds slow down
Solution Approach 1:
The patent extracts and removes the passgate component from the multiplexing mechanism. Instead of using passgates to route data between devices, the invention employs a master device that directly controls data transmission on the bidirectional bus, eliminating the parasitic capacitance accumulation that occurs with passgate-based multiplexing.
Solution Approach 2:
The master device performs multiple functions: it acts as both a data transmitter and a bus controller, managing communication with multiple slave devices without requiring separate passgates for each device. This multi-functional approach eliminates the need for multiple passgates that would accumulate parasitic capacitance.
2Ease of operation
If passgates are used for multiplexing, then device access to bus is controlled, but voltage drop increases and noise margin decreases
Solution Approach 1:
The patent removes the passgate element from the system, eliminating the voltage drop that occurs across passgate on-resistance. The master device directly drives the bus without intermediate passgate components, preserving voltage levels and maintaining adequate noise margins for reliable communication.
Solution Approach 2:
The master device acts as an intermediary that directly controls bus access and data transmission, eliminating the need for passgates as intermediate components. This direct control mechanism maintains voltage integrity while still providing bus access control through the master's transmission logic.
3Adaptability or versatility
If bus length increases or more devices are added, then system capability expands, but parasitic capacitance increases and transitions slow further
Solution Approach 1:
By removing passgates from the system architecture, the patent eliminates a major source of parasitic capacitance. This allows the bus to support longer lengths and more devices without the transition time degradation that would otherwise result from cumulative passgate capacitance.
Solution Approach 2:
The master device prepares and controls data transmission in advance, managing bus arbitration and transmission timing proactively. This preliminary control prevents capacitance-related delays from accumulating, as the master directly drives the bus without requiring signal passage through multiple device interfaces and passgates.
4Speed
If active pulldown resistance is reduced to improve low-to-high transition, then rise time improves, but output low level voltage increases
Solution Approach 1:
The master device dynamically controls its pulldown resistance based on the required operation. During data transmission, the master can adjust its pulldown strength to optimize both rise time and output low level voltage, providing dynamic adaptation rather than fixed resistance values.
Solution Approach 2:
The patent employs adjustable pulldown resistance values in the master device, allowing optimization of the balance between rise time and output low level voltage. By changing the pulldown resistance parameter, the system can achieve fast transitions while maintaining adequate voltage levels for reliable logic recognition.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively decouples parasitic capacitance, enhances data transition speeds, and maintains noise immunity by using adjustable voltages in the repeater, eliminating the limitations of passgates and providing integrated switching and capacitance isolation.
Implementation Method 1
The comparator has a threshold voltage typically midway between logic 'low' and logic 'high' voltages so as to differentiate between a received low state and high state
Implementation Method 2
a logic 'low' turns on the active pulldown causing a low voltage on the bus
Implementation Method 3
During a logic 'high', the active pulldown is off, and the passive pullup on the bus causes a high voltage on the bus
Implementation Method 4
Each device and each bus line also has parasitic capacitance, shown for convenience in figures discussed in this document as capacitors to ground at each I/O node
Data Source
AI summary
A bidirectional repeater and data multiplexer for serial data has A-side I2C port devices A1-A4 coupled to comparators 302-308 and pulldowns to ground 316-322. Comparator outputs are coupled responsive to select lines S1-S4 of N:l Select 310 to terminal A1 of bidirectional control 210 to control pulldown to non-zero low voltage Vp 206 at B-side device B. An inverting comparator 208 coupled to terminal B1 of bidirectional control 210 responds to input threshold voltage Vt less than low voltage Vp, to prevent data lockup due to data flowback to devices A1-A4. Output data from comparator 208 is coupled responsive to select lines S1-S4 of 1:N Select 312 to control pulldowns 316-322. This selectively repeats routing of device A1-A4 data to device B. Data from device B is selectively routed to pulldowns of devices A1-A4.