Bi-directional RRAM Decoder with Single Transistor Drive
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Solution Overview
Problem
Conventional bi-directional RRAM memory devices face challenges in efficiently writing and reading data in both forward and reverse directions without added voltage drops across transistor select drivers, leading to increased costs and reduced performance.
Innovation Solution
A reversible tri-state memory device is developed, utilizing a single transistor 'on pitch' between metal lines, which includes a bi-directional threshold device like an ovonic threshold switch (OTS) to isolate the memory element and allow writing in both directions, reducing voltage drops and transistor complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional bi-directional RRAM memory devices use separate drive transistors for each direction, then writing in both forward and reverse directions is enabled, but device complexity and chip area increase
Solution Approach 1:
The patent merges the forward write drive transistor and reverse write drive transistor into a single shared drive transistor. The select lines (first select line and second select line) control the same drive transistor to enable both forward and reverse write operations, eliminating the need for separate drive transistors for each direction. This reduces device complexity while maintaining bi-directional write capability.
Solution Approach 2:
The single drive transistor serves multiple functions: it acts as the forward write drive transistor when activated by the first select line, and as the reverse write drive transistor when activated by the second select line. This multi-functional approach allows one transistor to replace what would traditionally require two separate transistors, reducing overall device complexity.
2Power
If conventional approaches use multiple transistors per bit line or word line, then adequate drive strength is provided, but voltage drops across select drivers increase
Solution Approach 1:
The patent extracts the drive function from multiple separate transistors and consolidates it into a single drive transistor per select line. By removing the redundant transistors that caused cumulative voltage drops, the design maintains adequate drive strength through the single transistor while eliminating the voltage drop penalty associated with multiple series transistors.
Solution Approach 2:
Instead of using multiple transistors in series to achieve drive strength (which causes voltage drops), the patent inverts the approach by using a single transistor with appropriate sizing and control mechanisms. The select lines control the single transistor to provide the necessary drive current without the cumulative voltage drops of multiple transistors in the signal path.
3Area of stationary object
If minimum cross-point cell architecture is used, then cell area is minimized, but separate read and write circuitry per column line increases complexity
Solution Approach 1:
The patent merges the read circuitry and write circuitry into a unified select line control system. The first select line and second select line serve dual purposes: they enable write operations when asserting write conditions and enable read operations when asserting read conditions. This eliminates the need for separate read and write circuitry per column line, reducing complexity while maintaining the minimum cross-point cell architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables efficient forward and reverse write and read operations in bi-directional RRAM cells, reducing chip size and cost while maintaining high performance, and avoiding the traditional drive penalty associated with unidirectional write approaches.
Implementation Method 1
a bi-directional threshold device like an ovonic threshold switch (OTS) to isolate the memory element
Data Source
AI summary
The present disclosure generally relates to the fabrication of and methods for creating a reversible tri-state memory device which provides both forward and reverse write and read drive to a bi-directional RRAM cell, thus allowing writing in the forward and reverse directions. The memory device, however, utilizes a single transistor “on pitch” which fits between two metal lines traversing the array tile.