Bidirectional SCR Reducing Junction Capacitance via Localized Doping
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Solution Overview
Problem
Symmetric bidirectional silicon-controlled rectifiers have high junction capacitance, limiting their application to high-speed components due to the inability to effectively reduce this capacitance, which is a challenge in protecting electronic devices from electrostatic discharge (ESD) events.
Innovation Solution
A bidirectional silicon-controlled rectifier is designed with a lightly-doped semiconductor structure and doped regions to reduce junction capacitance, incorporating lightly-doped and heavily-doped areas and wells, with buried areas formed in the substrate and epitaxial layers to minimize capacitance and enhance ESD current path resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a symmetric bidirectional silicon-controlled rectifier is designed with conventional doped structures, then the device can provide ESD protection, but the junction capacitance remains high which limits high-speed application
Solution Approach 1:
The patent applies local quality by creating a lightly-doped region specifically in the area between the doped well and the substrate. This localized modification of doping concentration in a specific region reduces the junction capacitance without affecting the overall ESD protection functionality of the device. The selective doping approach allows different regions to have optimized properties for their specific functions.
Solution Approach 2:
The patent changes the doping concentration parameter by introducing a lightly-doped region with lower doping concentration compared to the conventional uniformly doped structure. This parameter change in the doping concentration directly reduces the junction capacitance, enabling the device to achieve both ESD protection and high-speed performance requirements.
2Reliability
If the doping concentration is increased to improve ESD protection, then the protection capability is enhanced, but the junction capacitance increases which degrades high-speed performance
Solution Approach 1:
The patent uses local quality by maintaining heavily-doped regions for ESD protection while introducing a lightly-doped region specifically where the junction capacitance affects high-speed performance. This spatial differentiation of doping concentrations allows the device to simultaneously achieve high ESD protection capability and low junction capacitance for fast response.
Solution Approach 2:
The patent segments the doping structure into multiple regions with different doping concentrations: heavily-doped areas for ESD protection and a lightly-doped region for reducing junction capacitance. This segmentation allows each region to optimize its function independently, resolving the contradiction between protection level and response speed.
3Adaptability or versatility
If a conventional symmetric structure is used, then the device provides bidirectional protection, but the junction capacitance cannot be reduced due to the well-substrate configuration
Solution Approach 1:
The patent maintains the symmetric bidirectional structure for versatility while applying local quality by introducing a lightly-doped region in the junction area. This localized modification reduces the junction capacitance without disrupting the bidirectional protection symmetry, allowing the device to maintain adaptability while achieving high-speed performance.
Solution Approach 2:
The patent introduces asymmetry in the doping concentration profile by creating a lightly-doped region between the well and substrate, while maintaining the overall symmetric structure for bidirectional protection. This controlled asymmetry in doping allows capacitance reduction while preserving the bidirectional functionality required for versatile protection.
Data Source
AI summary
A bidirectional silicon-controlled rectifier includes a lightly-doped semiconductor structure, a first lightly-doped region, a second lightly-doped region, a first doped well, a second doped well, a first heavily-doped area, a second heavily-doped area, a third heavily-doped area, a fourth heavily-doped area. The lightly-doped semiconductor structure, the first heavily-doped area, and the third heavily-doped area have a first conductivity type. The first lightly-doped region, the second lightly-doped region, the first doped well, the second doped well, the fourth heavily-doped area, and the second heavily-doped area have a second conductivity type. A first part of the first lightly-doped region is arranged under the first doped well. A second part of the second lightly-doped region is arranged under the second doped well.