Bi-directional Tracking Circuit for DRAM Timing Constraints

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Solution Overview

Problem

Existing memory devices with DRAM require multiple uni-directional tracking circuits to manage various timing constraints, increasing design complexity and manufacturing costs, while using a simple controller with loosest timing constraints compromises operational efficiency.

Innovation Solution

A memory device with bi-directional tracking circuits that monitor specific timing constraints associated with word line and bit line operations, allowing for efficient tracking of multiple constraints using two circuits instead of multiple uni-directional ones.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple uni-directional tracking circuits are used to manage various timing constraints, then timing constraint tracking accuracy is improved, but device complexity and manufacturing costs increase

Engineering Contradiction:
Improvetiming constraint tracking accuracyVSAvoidtracking circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies the universality principle by designing a bi-directional tracking circuit that can perform multiple tracking functions in both forward and reverse directions. Instead of using separate uni-directional tracking circuits for each timing constraint, a single bi-directional circuit handles multiple constraints by switching between different tracking modes, thereby reducing device complexity while maintaining tracking accuracy.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges multiple uni-directional tracking circuits into a single bi-directional tracking circuit. By combining the functionality of multiple circuits into one unified structure that operates in both directions, the patent reduces the overall number of components, simplifies the tracking system architecture, and lowers manufacturing costs while preserving the ability to accurately track all timing constraints.

Inventive Principle:
Principle #5Merging (Combining)

2Device complexity

If a simple controller with loosest timing constraint is used, then device complexity is reduced, but operational efficiency deteriorates

Engineering Contradiction:
Improvecontroller complexityVSAvoidoperational efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent applies the dynamics principle by implementing a bi-directional tracking circuit that can dynamically adjust its tracking behavior based on operational requirements. The circuit can switch between different tracking modes and directions depending on the specific timing constraints being monitored, allowing the controller to maintain simplicity while achieving high operational efficiency through adaptive tracking.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters of the tracking circuit by enabling it to operate in both forward and reverse directions with different tracking configurations. This parameter flexibility allows a single simple controller to effectively manage multiple timing constraints with different characteristics, thereby maintaining operational efficiency without increasing controller complexity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8824238B2Memory device with bi-directional tracking of timing constraints
Publication Date: 2014.09.02 ETRON TECH INC
  • US8824238B2 patent drawing
  • US8824238B2 patent drawing
  • US8824238B2 patent drawing

AI summary

A memory device includes a DRAM, a first bi-directional tracking circuit and a second bi-directional tracking circuit. The DRAM includes a cell, a word line and a bit line. The first bi-directional tracking circuit is configured to track a first timing constraint associated with turning on or turning off the word line. The second bi-directional tracking circuit is configured to track a second timing constraint associated with turning on the bit line, turning off the bit line, or accessing the cell via the bit line.