Bijective Matrix Address Scrambling in Galois Fields for Memory Security
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Solution Overview
Problem
Existing memory devices face security vulnerabilities due to the ease with which an intercepting device can determine the logical to physical address mapping, compromising data integrity.
Innovation Solution
The memory device employs address scrambling using bijective matrices, including circulant and non-circulant reordering matrices, generated from a seed value, to transform logical addresses into physical addresses, increasing the complexity for an intercepting device to determine the mapping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional address mapping is used, then the system is simple to implement, but security is compromised as intercepting devices can easily determine the logical to physical address mapping
Solution Approach 1:
The patent implements dynamic address scrambling by selecting different bijective matrices from a set of pre-generated matrices based on a seed value. The mapping relationship changes dynamically rather than being fixed, making it difficult for intercepting devices to determine the mapping. The system dynamically selects matrix B from multiple candidate matrices using the seed value to generate different logical-to-physical address mappings.
Solution Approach 2:
The patent changes the parameters of the address mapping by using bijective matrices with specific mathematical properties (determinant non-zero in Galois field GF(2^m)). The seed value parameters are used to select from multiple matrices, each providing a different mapping transformation. This parameter-based approach allows flexible security enhancement while maintaining mathematical reversibility for legitimate access.
2Reliability
If address scrambling is implemented to enhance security, then data protection is improved, but the time required to determine the address mapping increases significantly
Solution Approach 1:
The patent performs preliminary actions by pre-generating a set of bijective matrices before the actual address mapping operation. These matrices are prepared in advance and stored for quick retrieval. When address mapping is needed, the system simply selects from the pre-computed matrices using the seed value, avoiding the need for complex real-time computation and minimizing time loss.
Solution Approach 2:
The patent uses multiple copies of bijective matrices with different transformation properties. Instead of computing a single complex mapping in real-time, the system has multiple pre-computed mapping copies available. The seed value determines which copy to use, enabling fast selection while maintaining security through the mathematical complexity of the matrix transformations.
3Reliability
If bijective matrices are used for address scrambling, then the logical to physical address mapping becomes more secure, but the system complexity increases
Solution Approach 1:
The patent extracts the complex matrix selection and multiplication operations into a dedicated address mapping circuit module. This separate module handles the bijective matrix operations independently from the main processing logic, simplifying the overall system architecture. The complex mathematical operations are encapsulated in a self-contained unit that can be implemented using standard logic circuits for Galois field operations.
Solution Approach 2:
The patent introduces an intermediary seed value that mediates between the simple input address and the complex matrix selection process. The seed value acts as a key that determines which pre-computed bijective matrix to use, simplifying the control logic. The intermediary also includes a reverse mapping mechanism that uses the same seed value to select the corresponding inverse matrix, ensuring consistent and reversible transformations.
Data Source
AI summary
Methods, systems, and devices for address scrambling by linear maps in Galois fields are described. For instance, a device may determine a bijective matrix based on a power up condition. In some examples, the device may determine the bijective matrix based on a seed value and/or may select the matrix from among a set of bijective matrices. In some examples, the bijective matrix may have at least one column and/or one row that has at least two non-zero elements. The device may generate a first address of a first address space based on applying the matrix (e.g., each column of the matrix) to at least a portion of a second address of a second address space and may access a memory array of the device based on generating the first address.