Bi-Layer Gate Liner Structure for Uniform FinFET Gate Etching
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Solution Overview
Problem
Conventional semiconductor fabrication processes face challenges in maintaining uniform gate height and reducing etching loading issues due to differences in device sizes, particularly in FinFET devices, leading to degraded performance and increased complexity and cost.
Innovation Solution
The implementation of a unique fabrication process that forms T-shaped helmets with high-k dielectric material above gate spacers and etches metal gate electrode materials to similar dimensions, allowing simultaneous etching of work function metal and tungsten, and using a bi-layer T-shaped helmet structure with different dielectric materials to minimize parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication processes are used for FinFET devices with varying sizes, then manufacturing simplicity is maintained, but gate height loss increases and device performance degrades
Solution Approach 1:
The fabrication process is segmented into distinct stages: forming T-shaped helmets with high-k dielectric material above gate spacers, selective etching of metal gate electrode materials to similar dimensions, and coordinated etching of work function metal and tungsten. This segmentation allows each stage to be optimized independently, achieving uniform gate height across devices of varying sizes while maintaining manageable process complexity
Solution Approach 2:
The patent applies local quality by using high-k dielectric material specifically in the T-shaped helmet structure above gate spacers, and by selectively etching metal gate electrode materials to similar dimensions regardless of overall device size. This localized treatment ensures uniform gate height and protects gate spacers from inadvertent etching, improving manufacturing precision without requiring complete process redesign
2Productivity
If devices of different sizes are processed simultaneously, then productivity is improved, but etching loading issues increase causing excessive gate height loss
Solution Approach 1:
The patent changes etching parameters by adjusting the etching process to remove metal gate electrode materials to similar dimensions across devices of different sizes. This parameter adjustment, combined with the T-shaped helmet structure, allows simultaneous processing of varying device sizes while maintaining uniform gate height and minimizing etching loading effects
Solution Approach 2:
The bi-layer T-shaped helmet structure uses different dielectric materials to minimize parasitic capacitance while providing protection during etching. This composite structure enables simultaneous processing of devices with different dimensions by compensating for loading effects, thereby maintaining both productivity and gate height control
3Reliability
If gate spacers are not protected during etching, then process simplicity is maintained, but inadvertent etching of gate spacers occurs degrading device performance
Solution Approach 1:
The T-shaped helmet structure with high-k dielectric material is formed preliminarily above the gate spacers before the metal gate electrode etching process. This preliminary action protects the gate spacers from inadvertent etching while allowing the metal gate materials to be etched to similar dimensions, improving device reliability without adding significant process complexity
Solution Approach 2:
The high-k dielectric material in the T-shaped helmet acts as an intermediary protective layer during etching. It selectively protects the gate spacers from etching while allowing the metal gate electrode materials to be removed, thereby preserving device performance without requiring complex protective measure
Data Source
AI summary
A semiconductor device includes a semiconductor layer. A gate structure is disposed over the semiconductor layer. A spacer is disposed on a sidewall of the gate structure. A height of the spacer is greater than a height of the gate structure. A liner is disposed on the gate structure and on the spacer. The spacer and the liner have different material compositions.