Binary Rounding Circuit for Unbiased Precision With Lower Hardware Cost
Solution Overview
Problem
Existing rounding methods introduce bias and require significant hardware resources, leading to inaccurate and inefficient calculations in electronic systems.
Innovation Solution
A method and hardware implementation for unbiased rounding of numbers, utilizing a first and second adder unit and a shifter to efficiently truncate bits based on the bit above the rounding point, reducing hardware requirements and bias.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If round to even method is used to achieve unbiased rounding, then rounding bias is eliminated, but hardware cost increases considerably
Solution Approach 1:
The patent divides the rounding process into two distinct phases: a deterministic phase that adds 0.5 to the input number, and a probabilistic phase that rounds based on the least significant bit with 50% probability. This segmentation allows the system to achieve unbiased rounding without requiring complex hardware, as each phase can be implemented with simple logic circuits.
Solution Approach 2:
The patent introduces an intermediary random bit generation mechanism that mediates the rounding decision. Instead of directly implementing complex round-to-even logic, a random bit (0 or 1 with equal probability) is generated and used to determine whether to round up or down when the input is exactly at the rounding threshold. This intermediary random element simplifies the hardware while maintaining statistical unbiasedness.
2Device complexity
If basic rounding down method is used, then hardware complexity is reduced, but rounding bias increases as values are reduced by half on average
Solution Approach 1:
The patent applies preliminary anti-action by adding 0.5 to the input number before rounding. This pre-adjustment counteracts the inherent downward bias of simple truncation rounding. By shifting the value upward by half a unit in the least significant position before the rounding operation, the expected rounding error is reduced from -0.5 to approximately zero, thereby eliminating the systematic bias while keeping the rounding logic simple.
3Productivity
If rounding is performed in sequence of calculations, then calculations can be performed, but rounding errors accumulate and make final results meaningless
Solution Approach 1:
The patent implements a feedback mechanism where the least significant bit of the intermediate result is fed back into the rounding decision process. Instead of simply discarding the fractional part, the system uses the LSB to probabilistically determine the rounding direction. This feedback loop ensures that rounding errors are randomized rather than systematically accumulated, maintaining numerical stability over multiple sequential calculations.
Data Source
AI summary
A method and hardware for performing hardware efficient unbiased rounding of a number includes receiving the number in a binary format having a first portion and a second portion. The first portion comprises bits of the number above a rounding point and the second portion comprises bits of the number after the rounding point. The method includes adding a first amount to the number to obtain a first value. Further the method comprises determining if the bit above the rounding point for a controlling value is ‘0’ bit or a ‘1’ bit. The controlling value is either the received number in the binary format or the first value. The method further includes adding a second amount to ‘b+1’ LSBs of the first value to obtain a second value if the bit above the rounding point for the controlling value is a ‘0’ bit and rounding the number by truncating the last b bits of the second value or the last b bits of the first value based on the determination.