Bipolar Power Device Junction Termination
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Solution Overview
Problem
Existing bipolar non-punch-through power semiconductor devices face challenges with high electric fields, increased leakage current, and reduced breakdown voltage due to thickness variations in the p-doped layers, which affect their efficiency and reliability, especially in high-voltage applications like HVDC.
Innovation Solution
A bipolar non-punch-through power semiconductor device with a blocking voltage of at least 2500 V is designed, featuring a semiconductor wafer with a two-layer structure where the first layer's thickness increases linearly from the inner to the outer region, reducing peak electric fields and maintaining robust reverse blocking capabilities through a modified junction termination with lightly-doped P-type termination layers and a negative bevel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the thickness of the p-doped first layer is reduced in the inner region to minimize losses and improve power rating, then on-state voltage drop and conduction losses are reduced, but peak electric fields increase and breakdown voltage decreases
Solution Approach 1:
The patent applies local quality by creating different thickness profiles of the p-doped first layer in different regions: a thinner first section (61) in the inner region for low losses, and a thicker second section (62) in the outer region for high breakdown voltage. This spatial variation in layer thickness allows simultaneous optimization of both conduction losses and reliability.
Solution Approach 2:
The patent transitions from a uniform thickness design to a depth-varying thickness design by introducing a negative bevel angle. This adds a dimensional aspect to the layer thickness, creating a gradient structure that resolves the contradiction between thin layers (low losses) and thick layers (high breakdown voltage).
2Reliability
If local deep p doped termination layers are used at the termination region to maintain forward and reverse blocking, then blocking capability is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent segments the p-doped first layer into two distinct sections: a first section (61) in the inner region and a second section (62) in the outer region. This segmentation allows each section to be optimized independently for its specific function while simplifying the overall manufacturing process compared to deep localized termination layers.
3Reliability
If a negative bevel junction termination is used to keep peak electric fields inside the device, then surface leakage current is reduced and reliability is improved, but the first layer must be thicker than in positive bevel concepts
Solution Approach 1:
The patent applies local quality by creating different thickness profiles of the p-doped first layer in different regions: a thinner first section (61) in the inner region for low losses, and a thicker second section (62) in the outer region for high breakdown voltage. This spatial variation in layer thickness allows simultaneous optimization of both conduction losses and reliability.
Solution Approach 2:
The patent transitions from a uniform thickness design to a depth-varying thickness design by introducing a negative bevel angle. This adds a dimensional aspect to the layer thickness, creating a gradient structure that resolves the contradiction between thin layers (low losses) and thick layers (high breakdown voltage).
Data Source
AI summary
The invention relates to a bipolar non-punch-through power semiconductor device and a corresponding manufacturing method. The device comprises a semiconductor wafer and a first electrode formed on a first main side of the wafer and a second electrode formed on a second main side of the wafer opposite the first main side. The wafer comprises a pair of layers of different conductivity types, such as a drift layer of a first conductivity type, and a first layer of a second conductivity type arranged on the drift layer towards the first main side and contacting the first electrode.The wafer comprises an inner region wand an outer region surrounding the inner region. The drift layer has a thickness in the inner region greater or equal than a thickness in the outer region. A thickness of the first layer increases in a transition region between the inner region and the outer region from a thickness in the inner region to a maximum thickness in the outer region. The thickness of the first layer increases linearly over the transition region with a width of the transition region greater than 5 times a thickness of the first section of the first layer.


