Bipolar Read Scheme for Remanent Polarizable Memory

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Solution Overview

Problem

Existing memory technologies face challenges in efficiently reading memory cells with remanent polarizable portions due to imprint effects, which cause shifts in polarization states, leading to read failures and incorrect determination of memory states.

Innovation Solution

A bipolar read scheme is implemented, using alternating sequences of voltage drops of opposite polarities to re-center the hysteresis loop of remanent polarizable portions, allowing for reliable determination of initial memory states and reducing imprint-related effects during destructive read operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional read operation is used on memory cells with remanent polarizable portions, then the read operation is simple and fast, but imprint effects cause shifts in polarization states leading to read failures and incorrect determination of memory states

Engineering Contradiction:
Improveread reliabilityVSAvoidread operation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies periodic action by implementing a bipolar read scheme that uses alternating sequences of voltage drops of opposite polarities. This periodic application of reverse polarities re-centers the hysteresis loop and compensates for imprint effects that shift polarization states, thereby improving read reliability without requiring fundamental changes to the memory cell structure

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent employs parameter changes by modifying the voltage drop sequence parameters - specifically using alternating polarities and adjusting the timing and magnitude of voltage drops. This changes the electrical parameters applied during reading to counteract imprint effects and accurately determine the initial memory state

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If alternating sequences of voltage drops are applied to re-center the hysteresis loop, then imprint effects are compensated and read accuracy is improved, but the read operation time increases

Engineering Contradiction:
Improvememory state determination accuracyVSAvoidread operation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies partial action by using a limited number of alternating voltage drops (typically 1-3 cycles) rather than continuous operation. This provides sufficient compensation for imprint effects to achieve accurate reading while minimizing the time penalty, stopping once the hysteresis loop is adequately re-centered

Inventive Principle:
Principle #16Partial or excessive action

3Stability of the object's composition

If the memory cell structure with remanent polarizable portions is used, then non-volatile storage is achieved, but imprint effects cause shifts in polarization states during storage

Engineering Contradiction:
Improvememory state stabilityVSAvoidimprint effects
Core Design Contradiction:
Stability of the object's compositionVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary anti-action by using the bipolar read scheme to preemptively counteract imprint effects before they cause read failures. The alternating voltage drops proactively re-center the hysteresis loop and compensate for polarization shifts that occur during storage, preventing incorrect memory state determination

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The bipolar read scheme effectively compensates for imprint effects, ensuring accurate reading of memory states by shifting polarization properties back to predefined values, thereby improving read reliability and maintaining the original memory state post-read.

Implementation Method 1

A memory element may include at least one remanent polarizable portion

Methodology Applied
Scientific EffectRemanent polarization: Hysteresis

Implementation Method 2

causing an alternating sequence of voltage drops of opposite polarities over the at least one remanent polarizable portion

Methodology Applied
Scientific EffectHysteresis loop shifting: Hysteresis

Data Source

PatentUS12190932B2Memory device, memory controller, and methods thereof
Publication Date: 2025.01.07 FERROELECTRIC MEMORY GMBH
  • US12190932B2 patent drawing
  • US12190932B2 patent drawing
  • US12190932B2 patent drawing

AI summary

Various aspects relate to a destructive read out operation to read out a memory state of a remanent polarizable capacitive memory element. The destructive read out operation may include causing a voltage drop sequence over the remanent polarizable capacitive memory element, wherein the voltage drop sequence includes one or more voltage drops of a first polarity and one or more voltage drops of a second polarity opposite the first polarity. In some aspects, the destructive read out operation is configured as a bipolar read out operation to determine the memory state of the remanent polarizable capacitive memory element based on an electrical behavior of the remanent polarizable capacitive memory element during the voltage drop sequence.