Nonvolatile Memory Array Using Bipolar Programmable Resistance Elements
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Solution Overview
Problem
Conventional nonvolatile memory devices employing bipolar programmable resistance elements require an intervening erase operation, increasing circuit complexity and memory cell size, which hinders performance and costs.
Innovation Solution
A nonvolatile memory array configuration that enables direct write operations without the need for an intervening erase operation, utilizing a metal-oxide-semiconductor device with a bipolar programmable storage element, where each memory cell has terminals connected to word lines, bit lines, and source lines, allowing for shared lines to minimize footprint and complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an intervening erase operation is used in bipolar programmable resistance memory, then the memory can be programmed reliably, but the circuit complexity increases due to the need for negative voltage generation circuits
Solution Approach 1:
The patent extracts and eliminates the erase operation from the memory programming process. By using a unipolar programmable resistance element that only requires positive voltage for programming, the need for negative voltage generation circuits and separate erase operations is completely removed, thereby reducing peripheral circuit complexity while maintaining programming reliability
Solution Approach 2:
Instead of using the conventional bipolar approach that requires alternating positive and negative voltages for programming and erasing, the patent inverts the approach by using a unipolar element that requires only positive voltage. This inversion of the voltage polarity requirement eliminates the need for complex voltage switching circuits
2Productivity
If dual select lines are provided in bit direction to achieve direct write, then the erase operation can be eliminated, but the memory cell size increases significantly
Solution Approach 1:
The patent makes the bit line serve multiple functions: it acts as both a select line and a programming line. By applying positive voltage to the bit line, the memory cell is selected and programmed simultaneously, eliminating the need for separate select lines and reducing memory cell size while maintaining direct write capability
Solution Approach 2:
The patent changes the voltage parameter characteristics of the programmable resistance element from bipolar (requiring both positive and negative voltages) to unipolar (requiring only positive voltage). This parameter change enables direct write operations using the existing bit line without adding dual select lines, thereby avoiding increased cell size
3Reliability
If conventional bipolar memory architecture is used, then the storage element can be programmed, but the cost increases due to larger memory cell size
Solution Approach 1:
The patent extracts and removes the unnecessary erase functionality and associated circuits from the memory architecture. By using a unipolar programmable resistance element, the memory cell is simplified to contain only the essential programming components, reducing cell size and lowering manufacturing cost while preserving storage functionality
Solution Approach 2:
The patent inverts the conventional bipolar memory architecture by adopting a unipolar approach. This inversion eliminates the need for complex voltage switching and erase circuits, resulting in smaller memory cells and reduced manufacturing cost while maintaining reliable data storage capability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration eliminates the need for complex peripheral circuits, reduces memory cell size, and enhances programming performance by allowing direct write operations, achieving efficient memory array layout and cost-effectiveness.
Implementation Method 1
bipolar programmable resistance storage elements, which include materials such as 'spin-switched' or 'spin momentum transfer' magnetic materials
Implementation Method 2
bipolar programmable resistance storage elements, which include materials such as 'spin-switched' or 'spin momentum transfer' magnetic materials and/or programmable resistance transition-metal oxides
Data Source
AI summary
A nonvolatile memory array includes a plurality of word lines, a plurality of bit lines, a plurality of source lines, and a plurality of nonvolatile memory cells. Each of at least a subset of the plurality of memory cells has a first terminal connected to one of the plurality of word lines, a second terminal connected to one of the plurality of bit lines, and a third terminal connected to one of the plurality of source lines. At least one of the memory cells includes a bipolar programmable storage element operative to store a logic state of the memory cell, a first terminal of the bipolar programmable storage element connecting to one of a corresponding first one of the bit lines and a corresponding first one of the source lines, and a metal-oxide-semiconductor device including first and second source/drains and a gate. The first source/drain is connected to a second terminal of the bipolar programmable storage element, the second source/drain is adapted for connection to a corresponding second one of the bit lines, and the gate is adapted for connection to a corresponding one of the word lines. For at least a subset of the plurality of memory cells, each pair of adjacent memory cells along a given word line shares either the same bit line or the same source line.