Bipolar Select Device for Resistive Memory Area Reduction
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Solution Overview
Problem
Resistive sense memory technologies face challenges such as high current requirements for writing, which result in large area needs for MOSFET select transistors, limiting their integration and scalability in nonvolatile solid-state data storage devices.
Innovation Solution
A bipolar select device with a semiconductor substrate, collector contacts, an emitter contact layer, and a base layer that provides high drive current capability while consuming a small area and sharing one contact across multiple memory cells, reducing the number of electrical contacts required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If MOSFET select transistors are used to achieve the currents needed for writing, then the writing current requirement is met, but the area required becomes large
Solution Approach 1:
The patent changes the transistor type from MOSFET to bipolar transistor, fundamentally altering the device parameters to achieve higher current density in a smaller area. Bipolar transistors inherently provide higher drive current capability per unit area compared to MOSFETs, directly resolving the contradiction between meeting writing current requirements and minimizing select transistor area.
2Ease of operation
If more electrical contacts are provided for each memory cell, then the connectivity and control are improved, but the device complexity and area increase
Solution Approach 1:
The patent merges the collector contacts of multiple memory cells into a shared structure. Instead of providing separate collector contacts for each memory cell, the design allows multiple memory cells to share common collector contacts, thereby reducing the total number of electrical contacts while maintaining proper connectivity and control for each cell.
Solution Approach 2:
The shared collector contacts serve multiple functions by connecting to multiple memory cells simultaneously. This multi-functional approach allows a single electrical contact structure to fulfill the connectivity requirements for several memory cells, reducing overall device complexity without compromising ease of operation.
Data Source
AI summary
A resistive sense memory apparatus includes a bipolar select device having a semiconductor substrate, a plurality of collector contacts disposed in a first side of the of the semiconductor substrate, an emitter contact layer disposed in a second side of the semiconductor substrate, and a base layer separating the plurality of collector contacts from the emitter contact layer. Each collector contact is electrically isolated from each other. A resistive sense memory cells is electrically coupled to each collector contacts and a bit line. The base layer and the emitter contact layer provide an electrical path for the plurality of collector contacts.