Solid-State Devices TRIZ Cases

Multiple small vias and a reflective common cathode grid reduce dark spots and improve power-efficient local dimming in LED displays.

Different-band-gap oxide channel layers in 3D memory raise on-current, cut leakage current, and improve bias stability.

Different charge accumulation counts across pixel groups expand dynamic range, preserving weak signals while preventing bright-region saturation.

Replacing red and green filters with yellow layers plus quantum dot conversion and a dielectric layer improves luminance, color gamut, and manufacturability.

A non-contact conductive shield layer overlapping the data line cuts coupling to the pixel electrode and improves display quality.

A dopant-free electron transport stack and charge generation layer improve electron injection in multi-emission OLEDs, cutting driving voltage.

Rheology-matched phosphor films enable one-step lamination of dual- and multi-color LEDs, reducing settling while improving color uniformity.

A separate bottom electrode, reflector, and coupling structure prevent oxide-induced electrical opens while preserving high reflectivity in micro display IC pixels.

Tuned metal-ligand OLED dopants balance HOMO/LUMO and triplet levels to deliver deep blue emission, high efficiency, and longer lifespan.

Varying nanowire diameters in single-step selective area epitaxy enables monolithic visible-spectrum emission from one InGaN/GaN LED chip.

An ALD-formed metal nitrate interfacial layer protects metal nitride electrodes from high-temperature impurity buildup and stabilizes capacitance.

A V-shaped trench and vertical transfer gate move photoelectrons efficiently to the floating diffusion region, reducing black dots and ghost images.

Angled RGB sub-pixel layout and asymmetric chamfering align brightness centers, cutting drive current demand and extending OLED lifetime.

Sidewall protrusions and support layers raise capacitor bottom electrode aspect ratio to increase memory capacity while improving reliability.

Prebuilt light-blocking structures are transferred with micro LEDs to avoid lithography damage and improve yield on temporary substrates.

A ring-shaped light blocking trench shields black reference sensors from lateral light, improving calibration accuracy and reducing noise.

Wafer-level 3D bonding simplifies SSL-to-PV alignment, improves light coupling, and scales compact high-voltage optical transformers.

Patterned recess fills with intermediate CTE materials reduce stress, delamination, and cracking in stacked semiconductor structures.

Dual-sided PCB mounting with a support through-hole reduces toner sensor size, avoids component interference, and maintains stable optical measurement.

An ET-region pad layout lowers local insulation height so the FPC fully contacts testing pads and the display substrate lights normally.

Rear-side etching and polishing expose a silicon via core for self-aligned electrode contact while preserving oxide insulation from the substrate.

A split source follower with one source and two drains cuts thermal and flicker noise in tightly integrated image sensor pixels.

Tailored Formula X emissive compounds tune OLED output for saturated deep blue, blue, and green light with improved color accuracy and efficiency.

Discrete-thickness micro-lenses improve micro-LED light extraction and collimation where smooth lens fabrication is difficult at very small pitch.

A thicker top spacer and thinner bottom spacer let raised source/drain regions stay close for drive current while limiting gate overlap capacitance.

Low-temperature vapor deposition with substrate bias smooths resistive memory layers, preserving ohmic contact continuity and region isolation.

Tungsten-based interconnects and stoichiometric passivation enable low-resistance polysilicon-monosilicon connections for harsh media.

Multiple anti-reflection layers tuned for different colored light cut glass-surface reflection and color shift to improve display contrast.

Replacing a photodiode with a photoelectric thin-film transistor maintains high quantum efficiency while reducing sensor size and process complexity.

Staggered body contacts isolated from source and drain reduce SOI floating body effects while improving linearity, breakdown voltage, and RF performance.

Expanded chip spacing, resin sealing, and offset stacking improve semiconductor packaging throughput while enabling stable compact mounting.

Rounded substrate corners spread bending stress in flexible OLED layers, reducing metal film breakage and extending display service life.

A pixel layout shifts charge holding and transfer sections toward the optical center to block oblique light, cutting noise and focal plane distortion.

Excess charge is split between overflow capacitors and a supply path to extend image sensor dynamic range while preserving sensitivity and lowering noise.

A convex dielectric reflection layer reduces blue shift in LED phosphor lighting, improving luminance uniformity and light use efficiency.

Multiple color LED structures are integrated on one PCB with independent driving, simplifying assembly while enabling compact high-resolution lighting.

Microlenses and a light-shielding layer improve fingerprint sensor photosensitivity while blocking oblique light that degrades imaging quality.

Dual-gate IGZO connections through stacked insulating layers boost LTPO driving speed while preserving the low leakage benefit of oxide transistors.