Semiconductor Memory Device With Non-Uniform Sidewall Spacer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Next-generation semiconductor memory devices face challenges in achieving high performance and low power consumption while effectively integrating data storage elements and switching elements with efficient sidewall spacers to prevent contamination and ensure reliable operation.
Innovation Solution
The semiconductor memory device incorporates a substrate with conductive lines, memory cells featuring a lower electrode pattern, data storage element, intermediate electrode pattern, and switching element sequentially stacked, along with sidewall spacers that have varying thicknesses to accommodate concave surfaces of the switching and data storage elements, ensuring effective protection and preventing contamination during the patterning process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If uniform thickness sidewall spacers are used, then manufacturing process is simple, but switching element cannot be effectively protected from contamination due to concave side surface
Solution Approach 1:
The sidewall spacer is designed with non-uniform thickness where the thickness varies along the vertical direction. The spacer is thicker at the lower portion covering the concave side surface of the switching element and thinner at the upper portion, providing localized protection where contamination risk is highest while maintaining manufacturing feasibility.
Solution Approach 2:
The sidewall spacer structure is segmented into multiple thickness regions - a first thickness region covering the concave side surface of the switching element and a second thickness region covering the upper electrode pattern. This segmentation allows each region to perform its specific protective function optimally.
2Reliability
If thicker sidewall spacers are used to protect switching element, then contamination prevention improves, but manufacturing precision requirements increase
Solution Approach 1:
The sidewall spacer is formed as an etch stop layer before the final patterning process. This preliminary protective layer prevents contamination during subsequent manufacturing steps, and its non-uniform thickness is established in advance to match the concave profile of the switching element, reducing the need for high-precision thickness control during later processes.
Data Source
AI summary
A semiconductor memory device including a substrate; a first conductive line on the substrate and extending in a first direction that is parallel to an upper surface of the substrate; a second conductive line extending in a second direction that intersects the first direction; a memory cell between the conductive lines and including a lower electrode pattern, a data storage element, an intermediate electrode pattern, a switching element, and an upper electrode pattern sequentially stacked on the first conductive line; and a sidewall spacer on a side surface of the memory cell, wherein the side surface of the memory cell includes a first concave portion at a side surface of the switching element, and the sidewall spacer includes a first portion on a side surface of the upper electrode pattern, and a second portion on the first concave portion, the second portion being thicker than the first portion.