Thin Film Transistor Array Panel Storage Capacitance Design

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Solution Overview

Problem

In liquid crystal displays, maintaining appropriate capacitances such as liquid crystal capacitance, storage capacitance, and parasitic capacitance is crucial for optimal performance, but existing technologies often compromise aperture ratio and transmittance to achieve sufficient storage capacitance.

Innovation Solution

A thin film transistor array panel design that includes a middle storage electrode overlapping the drain electrode, forming additional storage capacitances without increasing the area of the drain and storage electrodes, thereby maintaining high aperture ratio and transmittance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the area of drain and storage electrodes is increased to form sufficient storage capacitance, then the storage capacitance is improved, but the aperture ratio and transmittance deteriorate

Engineering Contradiction:
Improvestorage capacitanceVSAvoidaperture ratio
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent introduces a middle storage electrode positioned between the lower and upper layers, creating a vertical stacking configuration. This multi-layer arrangement forms multiple storage capacitances (first storage capacitance between middle and drain electrodes, second storage capacitance between middle and pixel electrodes) in the vertical dimension rather than expanding horizontally, thereby increasing total storage capacitance without reducing aperture ratio

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The middle storage electrode is nested within the vertical structure between the lower layer and upper layer, with the lower layer formed on the drain electrode and the upper layer formed on the middle storage electrode. This nested configuration allows multiple capacitive structures to occupy overlapping horizontal space while maintaining distinct vertical positions, maximizing space utilization

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If the area of drain and storage electrodes is increased to form sufficient storage capacitance, then the storage capacitance is improved, but the transmittance deteriorates

Engineering Contradiction:
Improvestorage capacitanceVSAvoidtransmittance
Core Design Contradiction:
ReliabilityVSIllumination intensity

Solution Approach 1:

By transitioning from a planar electrode arrangement to a vertical multi-layer stacking configuration, the patent increases storage capacitance in the vertical dimension while minimizing horizontal footprint. This reduces the blocking of light paths and maintains high transmittance performance

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If additional storage capacitances are formed through multiple electrode overlaps, then the storage capacitance is improved, but the device complexity increases

Engineering Contradiction:
Improvestorage capacitanceVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The middle storage electrode serves multiple functions simultaneously: it forms the first storage capacitance with the drain electrode, forms the second storage capacitance with the pixel electrode, and acts as an intermediate structural layer. This multi-functionality increases storage capacitance without proportionally increasing device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent combines multiple storage capacitance functions into a single integrated structure using the middle storage electrode as a common element. Rather than implementing separate independent capacitance structures, the design merges them into one unified multi-layer configuration, simplifying manufacturing while achieving enhanced total capacitance

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8183570B2Thin film transistor array panel
Publication Date: 2012.05.22 SAMSUNG DISPLAY CO LTD
  • US8183570B2 patent drawing
  • US8183570B2 patent drawing
  • US8183570B2 patent drawing

AI summary

A thin film transistor array panel, in which a middle storage electrode and a storage electrode overlapping a drain electrode of a thin film transistor thereby forming a storage capacitance are formed. Accordingly, sufficient storage capacitance may be formed without a decrease of the aperture ratio and light transmittance of a liquid crystal display. Also, the capacitance may be sufficiently formed through the connecting member connected to a gate metal layer.